Multi-level memory access in an optical transceiver
First Claim
1. In an optical transceiver communicatively couplable to an external host processor, the optical transceiver including a processing entity, a system memory, and a memory access table having a plurality of access entries, each access entry for defining an access condition for a corresponding memory segment, a method of granting access to the system memory on a per-segment basis, the method comprising:
- an act of the receiving a request from the external host processor for access privileges to at least one segment of system memory;
in response to receiving the request for access privileges;
an act of the processing entity reading a first access entry defining a first access condition for accessing a first segment of system memory;
an act of the processing entity determining external host processor access privileges for the first segment of system memory based on the first access condition read;
an act of the processing entity reading a second access entry defining a second access condition for accessing a second segment of system memory, wherein the second access condition may be met by satisfying the first access condition or another access condition; and
an act of the processing entity determining external host processor access privileges for the second segment of system memory based on the second access condition read.
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Accused Products
Abstract
A mechanism that enables an optical transceiver to grant access to its memory on a per-segment basis. The optical transceiver includes a processor, system memory and a memory access table. The memory access table is comprised of access entries, each of which defines the access condition for a corresponding segment of memory. The processor reads the access entries for a particular segment of the memory. The processor or other optical transceiver component then determines whether or not to grant access to the memory segment based on the access entry read by the processor. Different levels of access control may be accommodated.
90 Citations
22 Claims
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1. In an optical transceiver communicatively couplable to an external host processor, the optical transceiver including a processing entity, a system memory, and a memory access table having a plurality of access entries, each access entry for defining an access condition for a corresponding memory segment, a method of granting access to the system memory on a per-segment basis, the method comprising:
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an act of the receiving a request from the external host processor for access privileges to at least one segment of system memory;
in response to receiving the request for access privileges;
an act of the processing entity reading a first access entry defining a first access condition for accessing a first segment of system memory;
an act of the processing entity determining external host processor access privileges for the first segment of system memory based on the first access condition read;
an act of the processing entity reading a second access entry defining a second access condition for accessing a second segment of system memory, wherein the second access condition may be met by satisfying the first access condition or another access condition; and
an act of the processing entity determining external host processor access privileges for the second segment of system memory based on the second access condition read. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. An optical transceiver communicatively coupled to an external host processor comprising:
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a processing entity;
a system memory;
a memory access table having a plurality of access entries, each access entry for defining an access condition for a corresponding memory segment;
wherein granting access to the system memory comprises;
receiving a request from the external host processor for access privileges to at least one segment of system memory;
in response to receiving the request for access privileges;
the processing entity reading a first access entry defining a first access condition for accessing a first segment of system memory;
the processing entity determining host processor access privileges for the first segment of system memory based on the first access condition read;
the processing entity reading a second access entry defining a second access condition for accessing a second segment of system memory, wherein the second access condition may be met by satisfying the first access condition or another access condition; and
the processing entity determining host processor access privileges for the second segment of system memory based on the second access condition read. - View Dependent Claims (13, 14, 15, 16, 17, 18, 19, 20, 21, 22)
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Specification