Imprint lithography for superconductor devices
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Abstract
One aspect of this disclosure relates to a method of building a superconductor device on a substrate, comprising depositing an imprint layer on at least a portion of the subdtrate. The imprint layer is imprinted to provide an imprinted portion of the imprint layer and a non-imprinted portion of the imprint layer. A superonductor layer is deposited on at least a portion of the imprint portion of the imprint layer.
47 Citations
53 Claims
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1-46. -46. (canceled)
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47. A computer readable medium having programming thereon for:
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depositing an imprint layer on at least a portion of a substrate;
imprinting the imprint layer to provide at least one imprinted recess in the imprint layer and a non-imprinted portion of the imprint layer that at least partially surrounds the imprinted recess in the imprint layer;
depositing a first superconductor layer in at least a portion of the imprinted recess of the imprint layer;
forming a tunnel junction at least partially in contact with the first superconductor layer; and
depositing a second superconductor layer at least partially in contact with the tunnel junction, wherein at least a portion of the second superconductor layer extends beyond a portion of the imprinted recess of the imprint layer in which the first superconductor layer is deposited and the first superconductor layer, the tunnel junction, and the second superconductor layer combine to form a superconductor device. - View Dependent Claims (48)
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49. A computer readable medium having programming thereon for:
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forming a substrate from a flexible material;
depositing an imprint layer on at least a portion of the substrate;
imprinting the imprint layer to provide an imprinted recess within the imprint layer and a non-imprinted portion of the imprint layer that at least partially surrounds the imprinted recess;
depositing a first superconductor layer in at least a portion of the imprinted region of the imprint layer;
forming a tunnel junction at least partially in contact with the first superconductor layer;
depositing a second superconductor layer at least partially in contact with the tunnel junction, wherein at least a portion of the second semiconductor layer extends above the non-imprinted portion of the imprint layer and the first superconductor layer, the tunnel junction, and the second superconductor layer combine to form the superconductor device; and
lifting-off at least a portion of the superconductor device from at least a portion of the non-imprinted portion of the imprint layer to create the portion of the superconductor device that is separate from the substrate.
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50. A control system for the fabrication of a superconductor device, comprising:
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a central processing unit;
memory operatively coupled to the central processing unit;
input/output circuits operatively coupled to the central processing unit; and
the memory having programming residing thereon that when executed by the central processing unit causes the central processing unit to implement the following acts depositing an imprint layer on at least a portion of a substrate, imprinting the imprint layer to provide at least one imprinted recess in the imprint layer and a non-imprinted portion of the imprint layer that at least partially surrounds the imprinted recess in the imprint layer, depositing a first superconductor layer in at least a portion of the imprinted recess of the imprint layer, forming a tunnel junction at least partially in contact with the first superconductor layer, and depositing a second superconductor layer at least partially in contact with the tunnel junction, wherein at least a portion of the second superconductor layer extends beyond a portion of the imprinted recess of the imprint layer in which the first superconductor layer is deposited and the first superconductor layer, the tunnel junction, and the second superconductor layer combine to form a superconductor device.
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51. A control system for the fabrication of a superconductor device, comprising:
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a central processing unit;
memory operatively coupled to the central processing unit;
input/output circuits operatively coupled to the central processing unit; and
the memory having programming residing thereon that when executed by the central processing unit causes the central processing unit to implement the following acts forming a substrate from a flexible material, depositing an imprint layer on at least a portion of the substrate, imprinting the imprint layer to provide an imprinted recess within the imprint layer and a non-imprinted portion of the imprint layer that at least partially surrounds the imprinted recess, depositing a first superconductor layer in at least a portion of the imprinted region of the imprint layer, forming a tunnel junction at least partially in contact with the first superconductor layer, depositing a second superconductor layer at least partially in contact with the tunnel junction, wherein at least a portion of the second semiconductor layer extends above the non-imprinted portion of the imprint layer and the first superconductor layer, the tunnel junction, and the second superconductor layer combine to form the superconductor device, and lifting-off at least a portion of the superconductor device from at least a portion of the non-imprinted portion of the imprint layer to create the portion of the superconductor device that is separate from the substrate.
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52. An in-process structure in the fabrication of a superconductor device, the in-process structure comprising:
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a substrate;
a deformable material formed over the substrate, the deformable material having imprints therein in a pattern of first superconductor electrodes for an array of Josephson junctions; and
a superconductor layer in each imprint.
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53. An in-process structure in the fabrication of a superconductor device, the in-process structure comprising:
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a substrate;
a first superconductor layer formed over the substrate in a pattern of first superconductor electrodes for an array of Josephson junctions;
oxidized portions of the first superconductor layer at desired locations of the Josephson junctions;
a deformable material formed over the first superconductor layer, the deformable material having imprints therein in, a pattern of second superconductor electrodes for the array of Josephson junctions; and
a second superconductor layer in each imprint.
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Specification