Method and apparatus for testing circuit boards

• US 20050197797A1
• Filed: 04/08/2004
• Published: 09/08/2005
• Est. Priority Date: 03/04/2004
• Status: Active Grant

• Current Assignee: Dowtech Incorporated
• Original Assignee: Dowtech Incorporated
• Inventors: Nolan, J. Brent, Dowland, David A.
• Granted Patent: US 7,243,038 B2
• Time in Patent Office: Days
• US Class Current: 702/115
• CPC Class Codes: G01R 31/2808 Holding, conveying or contacting devices, e.g. test adapters, edge connectors, extender boards probe, multiprobe, probe manipulator or probe fixture G01R1/067

Abstract

A system and method for inductance testing a planar magnetic circuit in a board having a pair of contacts that may include a core; a pair of leads; a controller for contacting the pair of leads with the pair of contacts, registering the core with the planar magnet circuit, and delivering an electrical current through the planar magnetic circuit while the core enhances inductance in said planar magnetic circuit; and an inductance measuring tool. In another aspect, a system and method for high potential testing a planar magnetic circuit that may include providing an electrically isolated bed, loading the board on the bed, providing a pair of leads, contacting the pair of leads with the pair of contacts using a controller, delivering an electric current having a predetermined voltage between about 1,000 and about 30,000 volts through the planar magnetic circuit; and determining whether the board withstands the predetermined voltage. In another aspect, a plurality of beds may register a plurality of planar magnetic circuits.

Claims

1. A system for inductance testing a plurality of planar magnetic circuits, comprising:

a substrate;

a plurality of cores spaced and electrically isolated from one another and mounted on said substrate, wherein each one of said plurality of cores registers with a corresponding one of said plurality of planar magnetic circuits;

a pair of leads;

a controller for selecting one of said plurality of planar magnetic circuits and contacting said pair of leads with said selected planar magnetic circuit and delivering an electrical current through said selected planar magnetic circuit while the corresponding registered core enhances inductance in said selected planar magnetic circuit; and

an inductance measuring tool.

2. A system according to claim 1, further comprising a plurality of beds in said substrate for registering said plurality of planar magnetic circuits with said plurality of cores.

3. A system for inductance testing a planar magnetic circuit in a board having a pair of contacts, comprising:

a core;

a pair of leads;

a controller for contacting said pair of leads with said pair of contacts, registering said core with said planar magnet circuit, and delivering an electrical current through said planar magnetic circuit while said core enhances inductance in said planar magnetic circuit; and

an inductance measuring tool.

4. A system according to claim 3, wherein at least a part of said core is compressibly mounted.

5. A system for high potential testing a plurality of boards each having at least one planar magnetic circuit with a pair of contacts, comprising:

a substrate having a plurality of electrically isolated beds for receiving said plurality of boards;

a pair of leads;

a controller for selecting one of said plurality of planar magnetic circuits and contacting said pair of leads with a corresponding pair of contacts for said selected planar magnetic circuit; and

a high potential testing tool for delivering a predetermined voltage between about 1,000 volts and about 30,000 volts through said selected planar magnetic circuit and determining whether said selected planar magnetic circuit withstands said predetermined voltage.

6. A system according to claim 5, wherein said predetermined voltage is between about 2,000 volts and about 3,000 volts.

7. A system according to claim 5, further comprising means for subsequently indentifying said selected planar magnetic circuit if said selected planar magnetic circuit fails to withstand said predetermined voltage.

8. An apparatus for inductance testing boards having planar magnetic circuits, comprising:

a substrate;

a plurality of cores spaced and electrically isolated from one another and mounted on said substrate; and

a plurality of beds on said substrate for receiving said boards and registering said planar magnetic circuits with respect to said plurality of cores.

9. A method for inductance testing a board having a planar magnetic circuit and a pair of contacts, comprising the steps of:

providing a substrate having an electrically isolated core and bed;

loading said board on said bed to register said planar magnetic circuit with said core;

providing a pair of leads and a plate;

contacting said pair of leads with said pair of contacts and said plate with said core using a controller;

delivering an electrical current through said planar magnetic circuit while said plate and said core enhance inductance in said planar magnetic circuit;

measuring inductance in said planar magnetic circuit; and

determining whether said inductance is in a predetermined range.

10. A method according to claim 9, further comprising ablating at least a portion of said board if said inductance is not in said predetermined range.

11. A method according to claim 9, further comprising:

analyzing said board to identify a defect if said inductance is not in said predetermined range; and

improving a design of said board to overcome said defect.

12. A board approved by a method according to claim 9.

13. A board improved by a method according to claim 11.

14. A method of high potential testing a board having a planar magnetic circuit with a pair of contacts, comprising the steps of:

providing an electrically isolated bed;

loading said board on said bed, providing a pair of leads;

contacting said pair of leads with said pair of contacts using a controller;

delivering an electric current having a predetermined voltage between about 1,000 and about 30,000 volts through said planar magnetic circuit; and

determining whether said board withstands said predetermined voltage.

15. A method according to claim 14, wherein said predetermined voltage is between about 2,000 and about 3,000 volts.

16. A method according to claim 14, further comprising ablating at least a portion of said board if said board does not withstand said predetermined voltage.

17. A method according to claim 14, further comprising:

analyzing said board to identify a defect if said board does not withstand said predetermined voltage; and

improving a design of said board to overcome said defect.

18. A board approved by a method according to claim 14.

19. A board improved by a method according to claim 17.