Parallel data link layer controllers in a network switching device
First Claim
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1. A data link layer processor comprising:
- one or more media access controllers (MACs) for receiving a frame from a communication network; and
a statistics acquisition module, operatively coupled to the one or more MACs, for compiling statistics associated with each of the plurality of MACs.
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Abstract
The present invention features a data link layer processor for performing VLAN tagging operations, policing, shaping, and statistics acquisition integrally with one or more media access controllers (MACs). When a plurality of data link layer processors are operated in parallel in a switching device, the computational burden carried by the route engine is significantly reduced. Moreover, the data link layer processor in its several embodiments may be used to introduce various forms of pre-processing and post-processing into network switching systems that employ route engines that do not posses such functionality.
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14 Claims
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1. A data link layer processor comprising:
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one or more media access controllers (MACs) for receiving a frame from a communication network; and
a statistics acquisition module, operatively coupled to the one or more MACs, for compiling statistics associated with each of the plurality of MACs.
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2. A switching device comprising:
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one or more physical layer interfaces for receiving one or more frames from a communication network;
a plurality of data link layer processors, wherein each data link layer processor comprises;
one or more MACs, wherein each MAC is operatively coupled to a physical layer interface; and
a statistics acquisition module, operatively coupled to the one or more MACs, for compiling statistics on each of the plurality of MACs; and
a network processor, operatively coupled to the plurality of data link layer processors, for routing the one or more frames received from the plurality of data link layer processors. - View Dependent Claims (3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
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Specification