Optimized trench power MOSFET with integrated schottky diode

• US 20050199918A1
• Filed: 03/15/2004
• Published: 09/15/2005
• Est. Priority Date: 03/15/2004
• Status: Abandoned Application

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Inventors: Calafut, Daniel, Rexer, Christopher L.
• Application Number:
  US10/801,499
• Publication Number:
  US 20050199918A1
• Time in Patent Office: Days
• US Class Current: 257/260
• CPC Class Codes: H01L 29/0696 of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/7806 the other device being a Schottky barrier diode
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236
• CPC Class Codes: H01L 29/8725 of the trench MOS barrier type [TMBS]

Abstract

In accordance with the present invention, a monolithically integrated structure combines a field effect transistor and a Schottky structure in an active area of a semiconductor substrate. The field effect transistor includes a first trench extending into the substrate and substantially filled by conductive material forming a gate electrode of the field effect transistor. A pair of doped source regions are positioned adjacent to and on opposite sides of the trench and inside a doped body region. The Schottky structure includes a pair of adjacent trenches extending into the substrate. Each of the pair of adjacent trenches is substantially filled by a conductive material which is separated from trench side-walls by a thin layer of dielectric. The Schottky structure consumes 2.5% to 5.0% of the active area, and the field effect transistor consumes the remaining portion of the active area.

Claims

1. A monolithically integrated structure combining a field effect transistor and a Schottky structure in an active area of a semiconductor substrate, wherein:

the field effect transistor comprises;

a first trench extending into the substrate and substantially filled by conductive material forming a gate electrode of the field effect transistor; and

a pair of doped source regions positioned adjacent to and on opposite sides of the trench and inside a doped body region, the doped source regions forming a source electrode of the field effect transistor, and the substrate forming a drain electrode of the field effect transistor, and

the Schottky structure comprises;

a pair of adjacent trenches extending into the substrate, the pair of adjacent trenches being substantially filled by conductive material which is separated from trench side-walls by a thin layer of dielectric; and

a Schottky diode having a barrier layer formed on the surface of the substrate and between the pair of adjacent trenches;

wherein the Schottky structure consumes 2.5% to 5.0% of the active area, and the field effect transistor consumes the remaining portion of the active area.

2. The monolithically integrated structure of claim 1 wherein the field effect transistor further comprises a metal layer contacting the pair of doped source regions, the metal layer and the barrier layer comprise one of either titanium tungsten or titanium nitride.

3. The monolithically integrated structure of claim 2 wherein the barrier layer and the metal layer contacting the source regions connect together by an overlying layer of metal.

4. The monolithically integrated structure of claim 1 wherein the barrier layer forms the Schottky diode anode terminal and the substrate forms the Schottky diode cathode terminal.

5. The monolithically integrated structure of claim 1 wherein the integrated structure further comprises a second trench adjacent to the first trench, the second trench forming the gate electrode of the field effect transistor in a similar fashion to the first trench, wherein a distance between the first trench and the second trench is greater than a distance W separating the pair of adjacent trenches, and wherein the barrier layer and a metal layer contacting the source regions of the field effect transistor comprise one of either titanium tungsten or titanium nitride.

6. The monolithically integrated structure of claim 1 wherein the conductive material in the first and second trenches electrically connects to the conductive material in the pair of adjacent trenches between which the Schottky diode is formed.

7. The monolithically integrated structure of claim 1 wherein the conductive material in the pair of adjacent trenches between which the Schottky diode is formed is electrically isolated from the conductive material in the first and second trenches.

8. The monolithically integrated structure of claim 1 wherein the conductive material in the pair of adjacent trenches between which the Schottky diode is formed, is recessed into the pair of adjacent trenches and covered by a layer of dielectric material.

9. The monolithically integrated structure of claim 1 wherein the first trench has a thicker insulating layer along its bottom than along its sidewalls.

10. The monolithically integrated structure of claim 1 wherein each of the pair of adjacent trenches and the first trench has a thicker dielectric layer along its bottom than along its sidewalls.

11. A method of manufacturing a trench field effect transistor and a Schottky structure in an active area of a semiconductor substrate, the method comprising:

forming a plurality of trenches extending into the substrate, with a first trench being adjacent to a second trench, and the second being adjacent to a third trench, wherein the first trench forms part of the field effect transistor and the second and third trenches form part of the Schottky diode structure;

forming a layer of conductive material inside the plurality of trenches, the layer of conductive material being insulated from trench walls by a dielectric layer;

forming a doped body region extending into the substrate between the first and the second trenches and not between the second and the third trenches;

forming a doped source region inside the doped body region and adjacent to a side wall of the first trench; and

forming a conductive anode layer on the surface of the substrate between the second and the third trenches, and also between the first and second trenches,

whereby an interspersed field effect transistor-Schottky structure is formed in the active area such that the Schottky structure consumes 2.5% to 5.0% of the active area, and the field effect transistor consumes the remaining portion of the active area, and

wherein the substrate provides a drain terminal, the doped source region provides a source terminal and the conductive layer in the first trench provides a gate terminal, and a Schottky diode is formed with the substrate providing a cathode terminal and the conductive anode layer providing an anode terminal.