Nonvolatile semiconductor memory device and manufacturing method thereof

• US 20050199940A1
• Filed: 12/17/2004
• Published: 09/15/2005
• Est. Priority Date: 03/10/2004
• Status: Active Grant

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: Renesas Technology Corporation (Renesas Electronics Corporation)
• Inventors: Mine, Toshiyuki, Yokoyama, Natsuki, Yasui, Kan
• Granted Patent: US 7,115,943 B2
• Time in Patent Office: Days
• US Class Current: 257/315
• CPC Class Codes: H01L 29/40117 the electrodes comprising a charge-trapping insulator
• CPC Class Codes: H01L 29/792 with charge trapping gate insulator, e.g. MNOS-memory transistors
• CPC Class Codes: H10B 43/30 characterised by the memory core region

Abstract

A MONOS nonvolatile memory of a split gate structure, wherein writing and erasing are performed by hot electrons and hot holes respectively, is prone to cause electrons not to be erased and to remain in an Si nitride film on a select gate electrode sidewall and that results in the deterioration of rewriting durability. When long time erasing is applied as a measure to solve the problem, drawbacks appear, such as the increase of a circuit area caused by the increase of the erasing current and the deterioration of retention characteristics. In the present invention, an Si nitride film is formed by the reactive plasma sputter deposition method that enables oriented deposition and the Si nitride film on a select gate electrode sidewall is removed at the time when a top Si oxide film is formed.

Claims

1. A nonvolatile semiconductor memory device which has memory cells of a split structure, each memory cell comprising:

(a) a first semiconductor region and a second semiconductor region formed in a semiconductor substrate;

(b) a select gate and a memory gate formed after the formation of said select gate, said gates being formed above the portion located between said first and second semiconductor regions of said semiconductor substrate;

(c) a first insulator film formed between said select gate and said semiconductor substrate; and

(d) a second insulator film formed between said memory gate and said semiconductor substrate and also on the sidewall of said select gate, said sidewall being located between said select gate and said memory gate,

wherein said second insulator film formed between said memory gate and said semiconductor substrate includes a first potential barrier film on said semiconductor substrate, a silicon nitride film formed further thereon and a second potential barrier film formed yet further thereon, and one end of said silicon nitride film touches said first potential barrier film of said second insulator film formed on said select gate sidewall, and

wherein said second insulator film formed on said select gate sidewall between said select gate and said memory gate includes said first and second potential barrier films but does not include said silicon nitride film.

2. A nonvolatile semiconductor memory device according to claim 1, comprising:

a writing means to write by injecting electrons into a local region of said silicon nitride film from said semiconductor substrate; and

an erasing means to erase the electrons injected by said writing means by injecting holes into said local region of said silicon nitride film.

3. A nonvolatile semiconductor memory device according to claim 1, wherein one face of said select gate sidewall has an inversely tapered shape in a cross section thereof.

4. A nonvolatile semiconductor memory device according to claim 3, wherein said one face of said select gate sidewall is the one on the side adjacent to said memory gate;

and the angle between the extension of the surface of said select gate sidewall and the surface of said Si substrate is in the range from 75°

to 90°

.

5. A nonvolatile semiconductor memory device according to claim 1, wherein the thickness of the silicon oxide film acting as said first potential barrier film formed on said one face of said select gate sidewall is reduced at a portion close to said silicon substrate.

6. A nonvolatile semiconductor memory device according to claim 1, wherein an insulator film pattern is formed on said select gate;

and the edge of a select gate pattern is located on the inside of one of the edges of said insulator film pattern.

7. A nonvolatile semiconductor memory device according to claim 6, wherein said one face of said select gate sidewall is the one on the side adjacent to said memory gate;

and the distance between said edge of said insulator film pattern formed on said select gate and said select gate pattern edge located on the inside of said insulator film pattern edge is 40 nm or less.

8. A nonvolatile semiconductor memory device which has memory cells of a split structure, each memory cell comprising:

(a) a first semiconductor region and a second semiconductor region formed in a semiconductor substrate;

(b) a select gate and a memory gate formed after the formation of said select gate, said gates being formed above the portion located between said first and second semiconductor regions of said semiconductor substrate;

(c) a first insulator film formed between said select gate and said semiconductor substrate; and

(d) a second insulator film formed between said memory gate and said semiconductor substrate and also on the sidewall of said select gate, said sidewall being located between said select gate and said memory gate,

wherein said second insulator film includes a first potential barrier film on said semiconductor substrate, a silicon nitride film formed further thereon, and a second potential barrier film formed yet further thereon and the thickness of the silicon nitride film formed on said select gate sidewall between said select gate and said memory gate is thinner than the thickness of the silicon nitride film formed between said memory gate and said semiconductor substrate.

9. A nonvolatile semiconductor memory device according to claim 8, comprising:

a writing means to write by injecting electrons into a local region of said silicon nitride film from said semiconductor substrate; and

an erasing means to erase the electrons injected by said writing means by injecting holes into said local region of said silicon nitride film.

10. A nonvolatile semiconductor memory device according to claim 8, wherein one face of said select gate sidewall has an inversely tapered shape in a cross section thereof.

11. A nonvolatile semiconductor memory device according to claim 10, wherein said one face of said select gate sidewall is the one on the side adjacent to said memory gate;

and the angle between the extension of the surface of said select gate sidewall and the surface of said Si substrate is in the range from 75°

to 90°

.

12. A nonvolatile semiconductor memory device according to claim 8, wherein the thickness of the silicon oxide film acting as said first potential barrier film formed on said one face of said select gate sidewall is reduced at a portion close to said silicon substrate.

13. A nonvolatile semiconductor memory device according to claim 8, wherein an insulator film pattern is formed on said select gate;

and the edge of a select gate pattern is located on the inside of one of the edges of said insulator film pattern.

14. A nonvolatile semiconductor memory device according to claim 13, wherein said one face of said select gate sidewall is the one on the side adjacent to said memory gate;

and the distance between said edge of said insulator film pattern formed on said select gate and said select gate pattern edge located on the inside of said insulator film pattern edge is 40 nm or less.

15. A nonvolatile semiconductor memory device which has memory cells of a split structure, each memory cell comprising:

(a) a first semiconductor region and a second semiconductor region formed in a semiconductor substrate;

(b) a select gate and a memory gate formed after the formation of said select gate, said gates being formed above the portion located between said first and second semiconductor regions of said semiconductor substrate;

(c) a first insulator film formed between said select gate and said semiconductor substrate; and

(d) a second insulator film formed between said memory gate and said semiconductor substrate and also on the sidewall of said select gate, said sidewall being located between said select gate and said memory gate,

wherein said second insulator film formed between said memory gate and said semiconductor substrate includes a first potential barrier film on said semiconductor substrate, a silicon nitride film formed further thereon and a second potential barrier film formed yet further thereon, and

wherein said second insulator film formed on said select gate sidewall between said select gate and said memory gate includes said first potential barrier film on said semiconductor substrate, said silicon nitride film formed further thereon and said second potential barrier film formed yet further thereon, and said silicon nitride film formed on said select gate sidewall and the silicon nitride film formed between said memory gate and said semiconductor substrate are separated from each other by said second potential barrier film on said semiconductor substrate, resulting in non-continuous films.

16. A nonvolatile semiconductor memory device according to claim 15, comprising:

a writing means to write by injecting electrons into a local region of said silicon nitride film from said semiconductor substrate; and

an erasing means to erase the electrons injected by said writing means by injecting holes into said local region of said silicon nitride film.

17. A nonvolatile semiconductor memory device according to claim 15, wherein one face of said select gate sidewall has an inversely tapered shape in a cross section thereof.

18. A nonvolatile semiconductor memory device according to claim 17, wherein said one face of said select gate sidewall is the one on the side adjacent to said memory gate;

and the angle between the extension of the surface of said select gate sidewall and the surface of said Si substrate is in the range from 75°

to 90°

.

19. A nonvolatile semiconductor memory device according to claim 15, wherein the thickness of the silicon oxide film acting as said first potential barrier film formed on said one face of said select gate sidewall is reduced at a portion close to said silicon substrate.

20. A nonvolatile semiconductor memory device according to claim 15, wherein an insulator film pattern is formed on said select gate;

and the edge of a select gate pattern is located on the inside of one of the edges of said insulator film pattern.

21. A nonvolatile semiconductor memory device according to claim 20, wherein said one face of said select gate sidewall is the one on the side adjacent to said memory gate;

and the distance between said edge of said insulator film pattern formed on said select gate and said select gate pattern edge located on the inside of said insulator film pattern edge is 40 nm or less.

22. A nonvolatile semiconductor memory device according to claim 15, wherein said silicon nitride film formed on said select gate sidewall between said select gate and said memory gate and said silicon nitride film formed between said memory gate and said semiconductor substrate do not form a continuous film but are separated from each other at a distance of at least 2 nm by said second potential barrier film formed on said semiconductor substrate.

23. A method for producing a nonvolatile semiconductor memory device, in which the process of forming said silicon nitride film employs the reactive sputter deposition method that uses Si as the target and is applied in a gas atmosphere containing nitrogen and rare gas, said nonvolatile semiconductor memory device having memory cells of a split structure, each memory cell, comprising:

(a) a first semi-conductor-region and a second semiconductor region formed in a semiconductor substrate;

(b) a select gate and a memory gate formed after the formation of said select gate, said gates being formed above the portion located between said first and second semiconductor regions of said semiconductor substrate;

(c) a first insulator film formed between said select gate and said semiconductor substrate; and

(d) a second insulator film formed between said memory gate and said semiconductor substrate and also on the sidewall of said select gate, said sidewall being located between said select gate and said memory gate,

wherein said second insulator film formed between said memory gate and said semiconductor substrate includes a first potential barrier film on said semiconductor substrate, a silicon nitride film formed further thereon and a second potential barrier film formed yet further thereon, and one end of said silicon nitride film touches said first potential barrier film of said second insulator film formed on said select gate sidewall and

wherein said second insulator film formed on said select gate sidewall between said select gate and said memory gate includes said first and second potential barrier films but does not include said silicon nitride film.

24. A method for producing a nonvolatile semiconductor memory device, in which the process of forming said silicon nitride film employs any one of the reactive sputter deposition method, the plasma enhanced chemical vapor deposition method, the low-pressure chemical vapor deposition method that uses monosilane and ammonia as the material gas, and the low-pressure chemical vapor deposition method that uses monosilane and ammonia as the material gas, said nonvolatile semiconductor memory device having memory cells of a split structure, each memory cell comprising:

(a) a first semiconductor region and a second semiconductor region formed in a semiconductor substrate;

(b) a select gate and a memory gate formed after the formation of said select gate, said gates being formed above the portion located between said first and second semiconductor regions of said semiconductor substrate;

(c) a first insulator film formed between said select gate and said semiconductor substrate; and

(d) a second insulator film formed between said memory gate and said semiconductor substrate and also on the sidewall of said select gate, said sidewall being located between said select gate and said memory gate,

wherein said second insulator film includes a first potential barrier film on said semiconductor substrate, a silicon nitride film formed further thereon and a second potential barrier film formed yet further thereon, and the thickness of the silicon nitride film formed on said select gate sidewall between said select gate and said memory gate is thinner than the thickness of the silicon nitride film formed between said memory gate and said semiconductor substrate.

25. A method for producing a nonvolatile semiconductor memory device, in which the process of forming said silicon nitride film employs any one of the reactive sputter deposition method, the plasma enhanced chemical vapor deposition method, the low-pressure chemical vapor deposition method that uses monosilane and ammonia as the material gas, and the low-pressure chemical vapor deposition method that uses monosilane and ammonia as the material gas, said nonvolatile semiconductor memory device being provided with memory cells of a split structure, each memory cell comprising:

(a) a first semiconductor region and a second semiconductor region formed in a semiconductor substrate;

(b) a select gate and a memory gate formed after the formation of said select gate, said gates being formed above the portion located between said first and second semiconductor regions of said semiconductor substrate;

(c) a first insulator film formed between said select gate and said semiconductor substrate; and

(d) a second insulator film formed between said memory gate and said semiconductor substrate and also on the sidewall of said select gate, said sidewall being located between said select gate and said memory gate,

wherein said second insulator film formed between said memory gate and said semiconductor substrate includes a first potential barrier film on said semiconductor substrate, a silicon nitride film formed further thereon and a second potential barrier film formed yet further thereon, and

wherein said second insulator film formed on said select gate sidewall between said select gate and said memory gate includes said first potential barrier film, said silicon nitride film formed further thereon and said second potential barrier film formed yet further thereon, and said silicon nitride film formed on said select gate sidewall and said silicon nitride film formed between said memory gate and said semiconductor substrate are separated from each other by said second potential barrier film on said semiconductor substrate, resulting in non-continuous films.