Method and apparatus for robust mode selection with low power consumption

• US 20050200395A1
• Filed: 03/10/2004
• Published: 09/15/2005
• Est. Priority Date: 03/10/2004
• Status: Active Grant

• Current Assignee: Power Integrations Incorporated
• Original Assignee: Power Integrations Incorporated
• Inventors: Pham, Giao Minh
• Granted Patent: US 7,212,058 B2
• Time in Patent Office: Days
• US Class Current: 327/309
• CPC Class Codes: H02M 1/32 Means for protecting converters other than automatic disconnection
• CPC Class Codes: H02M 3/158 including plural semiconductor devices as final control devices for a single load

Abstract

A low power method and apparatus for selecting operational modes of a circuit. One circuit according to the teachings of the disclosed method and apparatus includes a first current limiting circuit coupled between a selector terminal and a first voltage bus. The first current limiting circuit is adapted to vary a current limit out of the selector terminal in response to a voltage on the selector terminal. The circuit also includes a second current limiting circuit coupled between the selector terminal and a second voltage bus. The second current limiting circuit adapted to vary a current limit into the selector terminal in response to the voltage on the selector terminal.

Claims

1. A circuit, comprising:

a first current limiting circuit coupled between a selector terminal and a first voltage bus, the first current limiting circuit adapted to vary a current limit out of the selector terminal in response to a voltage on the selector terminal; and

a second current limiting circuit coupled between the selector terminal and a second voltage bus, the second current limiting circuit adapted to vary a current limit into the selector terminal in response to the voltage on the selector terminal.

2. The circuit of claim 1 further comprising a plurality of voltage comparators coupled to the selector terminal.

3. The circuit of claim 2 further comprising decoder circuit coupled to the plurality of voltage comparators.

4. The circuit of claim 1 wherein the first current limiting circuit includes a first switch and a first variable current source coupled between the first voltage bus the selector terminal.

5. The circuit of claim 4 wherein the first switch is adapted to conduct when the voltage on the selector terminal is below a first threshold voltage, wherein the first switch is adapted not to conduct when the voltage on the selector terminal is above a second threshold voltage.

6. The circuit of claim 5 wherein the second current limiting circuit includes a second switch and a second variable current source coupled between the selector terminal and the second voltage bus.

7. The circuit of claim 6 wherein the second switch is adapted to conduct when the voltage on the selector terminal is above a third threshold voltage, wherein the second switch is adapted not to conduct when the voltage on the selector terminal is below a fourth threshold voltage.

8. The circuit of claim 7 wherein the first current limiting circuit is adapted to vary the current limit out of the selector terminal to a first current limit when the voltage on the selector terminal is below a fifth threshold voltage, wherein the first current limiting circuit is adapted to vary the current limit out of the selector terminal to a second current limit when the voltage on the selector terminal is above a sixth threshold voltage.

9. The circuit of claim 8 wherein the second current limiting circuit is adapted to vary the current limit into the selector terminal to a third current limit when the voltage on the selector terminal is above a seventh threshold voltage, wherein the second current limiting circuit is adapted to vary the current limit into the selector terminal to a fourth current limit when the voltage on the selector terminal is below an eighth threshold voltage.

10. The circuit of claim 7 wherein the first threshold voltage and the second threshold voltage are less than the third threshold voltage and the fourth threshold voltage.

11. The circuit of claim 8 wherein the fifth threshold voltage and the sixth threshold voltage are lower than the first threshold voltage and the second threshold voltage.

12. The circuit of claim 9 wherein the seventh threshold voltage and the eighth threshold voltage are higher than the third threshold voltage and the fourth threshold voltage.

13. The circuit of claim 8 wherein the first current limit is less than the second current limit.

14. The circuit of claim 9 wherein the third current limit is less than the fourth current limit.

15. The circuit of claim 1 wherein the circuit is included in an integrated circuit device.

16. The circuit of claim 15 wherein the integrated circuit device is a controller in a switching power supply.