Active matrix display devices

• US 20050200788A1
• Filed: 09/12/2003
• Published: 09/15/2005
• Est. Priority Date: 09/23/2002
• Status: Active Grant

• Current Assignee: InnoLux Corporation
• Original Assignee: InnoLux Corporation
• Inventors: Edwards, Martin J.
• Granted Patent: US 7,633,472 B2
• Time in Patent Office: Days
• US Class Current: 349/139
• CPC Class Codes: G09G 2300/0828 forming a digital to analog [D/A] conversion circuit
• CPC Class Codes: G09G 2330/021 Power management, e.g. power saving
• CPC Class Codes: G09G 3/2011 by amplitude modulation
• CPC Class Codes: G09G 3/2074 using sub-pixels
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence

Abstract

In an active matrix display device, such as AMLCD, having an array of pixels (P) addressed via sets of row and column conductors (14, 15) to which, respectively, selection and data signals are applied, each pixel comprises a plurality of sub pixels (P1-P4) which each have an associated switch, for example a TFT, (T1-T4) and which are addressed with data signals through a common switch (T1) coupled to a column conductor (15). Addressing the sub pixels through a common switch reduces the effective capacitance of the column conductor. By appropriate control of the switches (T1-T4) the pixels can be driven in a first mode in which the common switch (T1) is operated to control the simultaneous addressing of the sub pixels (P1-P4) with a data signal, for example, for a video display with full grey scale capability, and in a second mode in which the switches (T1-T4) are controlled sequentially to allow different data signals to be applied to the individual sub pixels, for example, as required for a low power standby mode of operation with limited grey scale and colour capability.

Claims

1. An active matrix display device comprising an array of pixels a set of row conductors through which rows of pixels are selected, a set of column conductors through which data signals are supplied to selected pixels, each pixel comprising a plurality of sub pixels which sub pixels are each associated with a respective switching transistor for controlling the supply of a data signal to the sub pixel,

wherein the plurality of sub pixels of a pixel are coupled to a column conductor associated with the pixel via a common switching transistor through which data signals are supplied to the sub pixels, and wherein the device is operable in a first mode in which the plurality of sub-pixels of a pixel are addressed simultaneously with a data signal and in a second mode in which the sub pixels (P1-P4) of a pixel are addressed individually with respective data signals.

2. A display device according to claim 1, wherein the device comprises drive means for providing data signals to the column conductors and switching signals to the row conductors, and wherein the drive means is operable in the first mode to switch the switching transistors associated with the sub pixels of a pixel at the same time so as to supply a data signal on the associated column conductor to each sub pixel, and wherein the drive means is operable in the second mode to switch the switching transistors associated with the sub pixels of the pixel selectively in sequence such that data signals on the associated column conductor are supplied to respective sub pixels.

3. A display device according to claim 1, wherein the sub pixels of a pixel are connected in serial manner with the input terminal of the switching transistor associated with the first sub pixel of the series being connected to the associated column address conductor and with the input terminal of the switching transistor associated with each of the other sub pixels in the series being connected to the output terminal of the switching transistor associated with the preceding sub pixel in the series.

4. A display device according to claim 1, wherein the sub pixels of a pixel are connected in parallel manner with the input terminal of the switching transistor associated with one sub pixel being connected to the associated column address conductor and with the input terminals of the switching transistors associated with the other sub pixels being connected to the output terminal of the switching transistor associated with the one pixel.

5. A display device according to any one of claim 1, wherein the control electrodes of the switching transistors associated with the sub pixels of a pixel are connected to respective different row conductors.

6. A display device according to any one of claim 1, wherein each pixel (P) comprises first and second sub pixels, wherein the control electrodes of the switching transistors associated with the first and second sub pixels of a pixel are connected to first and second row conductors respectively,

wherein, for each pixel, the input of the switching transistor associated with the first sub pixel is connected to the associated column conductor and the input of the switching transistor associated with the second sub pixel is connected to the output of the switching transistor associated with the first sub pixel,

wherein the first row conductor connected to one pixel is connected also to the control electrode of the switching transistor associated with the second sub pixel of another pixel connected to the associated column conductor,

and wherein the second row conductor connected to the one pixel is connected also to the control electrode of the switching transistor associated with the first sub pixel of a further pixel connected to the associated column address conductor.

7. A display device according to claim 1, wherein the sub pixels comprise liquid crystal picture elements connected to the outputs of their associated switching transistor.

8. A display device according to claim 7, wherein at least two sub pixels of a pixel are of different areas.