Data transfer control device and electronic instrument

• US 20050201411A1
• Filed: 03/08/2005
• Published: 09/15/2005
• Est. Priority Date: 03/09/2004
• Status: Active Grant

• Current Assignee: Seiko Epson Corporation (Seiko Group)
• Original Assignee: Seiko Epson Corporation (Seiko Group)
• Inventors: Shibata, Yukinari, Hasegawa, Tomonaga
• Granted Patent: US 7,633,965 B2
• Time in Patent Office: Days
• US Class Current: 370/463
• CPC Class Codes: G06F 2213/0038 System on Chip
• CPC Class Codes: H04L 12/40032 Details regarding a bus interface enhancer
• CPC Class Codes: H04L 12/40084 Bus arbitration
• CPC Class Codes: H04W 52/0232 according to average transmission signal activity
• CPC Class Codes: Y02D 30/70 in wireless communication networks

Abstract

A data transfer control device includes: an encoder circuit which performs encoding data and generation of a special code; a parallel/serial conversion circuit which converts parallel data from the encoder circuit to serial data; and a transmitter circuit which receives the serial data and transmits the special code and the data through the serial signal line. The transmitter circuit outputs an idle signal, logical level of which is continuously fixed at a first logical level in units of a given number of bits or more to the serial signal line as a signal indicating an idle state. The encoder circuit suspends operation after an indication that there is no transmission data by a transmission data valid/invalid signal from an upper layer circuit.

Claims

1. A data transfer control device for performing data transfer through a serial signal line, the data transfer control device comprising:

an encoder circuit which performs processing of encoding data by using a predetermined encoding method and generation processing of a special code defined by the encoding method;

a parallel/serial conversion circuit which receives parallel data from the encoder circuit and converts the parallel data to serial data; and

a transmitter circuit which receives the serial data from the parallel/serial conversion circuit and transmits the special code and the data through the serial signal line,

wherein the transmitter circuit outputs an idle signal, logical level of which is continuously fixed at a first logical level in units of a given number of bits or more to the serial signal line as a signal indicating an idle state, and

wherein, when absence of the transmission data due to an idle period has been indicated by a transmission data valid/invalid signal from an upper layer circuit, the encoder circuit suspends operation after the indication of the absence of the transmission data.

2. The data transfer control device as defined in claim 1,

wherein the parallel/serial conversion circuit suspends operation after the absence of the transmission data has been indicated by the transmission data valid/invalid signal and output of serial data from the parallel/serial conversion circuit has been completed.

3. The data transfer control device as defined in claim 1, comprising:

an operation suspension circuit which suspends operations of the encoder circuit and the parallel/serial conversion circuit,

wherein the operation suspension circuit suspends operations of the encoder circuit and the parallel/serial conversion circuit by suspending a clock signal supplied to the encoder circuit and the parallel/serial conversion circuit.

4. The data transfer control device as defined in claim 1,

wherein the encoder circuit encodes data by using an encoding method which expands N bits of data to M bits (N<

M;

N and M are integers larger than one) of data, and

wherein the transmitter circuit outputs the idle signal, logical level of which is continuously fixed at the first logical level in units of M bits or more to the serial signal line.

5. The data transfer control device as defined in claim 1,

wherein the encoder circuit encodes data by using an encoding method which expands N bits of data to M bits (N<

M;

N and M are integers larger than one) of data, and

wherein the transmitter circuit outputs an M-bit special code through the serial signal line.

6. The data transfer control device as defined in claim 1,

wherein the encoder circuit receives a special code generation direction signal from the upper layer circuit, and performs the generation processing of the special code indicated by the special code generation direction signal.

7. The data transfer control device as defined in claim 1,

wherein the transmitter circuit transmits a first polarity preamble code and a second polarity preamble code as the special code through the serial signal line.

12. An electronic instrument, comprising:

the data transfer control device as defined in claim 1;

and

at least one of a communication device, a processor, an imaging device, and a display device.

13. An electronic instrument, comprising:

the data transfer control device as defined in claim 2;

and

at least one of a communication device, a processor, an imaging device, and a display device.

14. An electronic instrument, comprising:

the data transfer control device as defined in claim 3;

and

at least one of a communication device, a processor, an imaging device, and a display device.

15. An electronic instrument, comprising:

the data transfer control device as defined in claim 4;

and

at least one of a communication device, a processor, an imaging device, and a display device.

16. An electronic instrument, comprising:

the data transfer control device as defined in claim 5;

and

at least one of a communication device, a processor, an imaging device, and a display device.

8. A data transfer control device for performing data transfer through a serial signal line, the data transfer control device comprising:

a receiver circuit which receives a special code and data through the serial signal line;

a serial/parallel conversion circuit which receives serial data from the receiver circuit and converts the serial data to parallel data;

an idle detection circuit which detects an idle signal, logical level of which is continuously fixed at a first logical level in units of a given number of bits or more; and

a decoder circuit which receives parallel data from the serial/parallel conversion circuit and performs decode processing of the data and the special code which have been encoded by using a predetermined encoding method,

wherein the serial/parallel conversion circuit suspends operation after the idle signal has been detected by the idle detection circuit and output of parallel data from the serial/parallel conversion circuit has been completed.

9. The data transfer control device as defined in claim 8,

wherein the decoder circuit suspends operation after the idle signal has been detected by the idle detection circuit and output of decoded data from the decoder circuit has been completed.

10. The data transfer control device as defined in claim 8, comprising:

an operation suspension circuit which suspends operations of the decoder circuit and the serial/parallel conversion circuit,

wherein the operation suspension circuit suspends operations of the decoder circuit and the serial/parallel conversion circuit by suspending a clock signal supplied to the decoder circuit and the serial/parallel conversion circuit.

11. The data transfer control device as defined in claim 8, comprising:

a preamble error detection circuit which performs detection processing of a preamble code which is the special code and informs a preamble error when the preamble code has not been detected,

wherein, when a first polarity preamble code and a second polarity preamble code are transferred through the serial signal line, the preamble error detection circuit omits performing detection processing of the first polarity preamble code which has been received first and performs detection processing of the second polarity preamble code which has been received after the first polarity preamble code.

17. An electronic instrument, comprising:

the data transfer control device as defined in claim 8;

and

at least one of a communication device, a processor, an imaging device, and a display device.

18. An electronic instrument, comprising:

the data transfer control device as defined in claim 9;

and

at least one of a communication device, a processor, an imaging device, and a display device.

19. An electronic instrument, comprising:

the data transfer control device as defined in claim 10;

and

at least one of a communication device, a processor, an imaging device, and a display device.

20. An electronic instrument, comprising:

the data transfer control device as defined in claim 11;

and

at least one of a communication device, a processor, an imaging device, and a display device.