Error adjustment for multi-antenna transmitter

• US 20050201483A1
• Filed: 03/12/2004
• Published: 09/15/2005
• Est. Priority Date: 03/12/2004
• Status: Abandoned Application

• Current Assignee: Nokia Solutions and Networks US LLC (Nokia Corporation)
• Original Assignee: Nokia Solutions and Networks US LLC (Nokia Corporation)
• Inventors: Coersmeier, Edmund
• Application Number:
  US10/799,574
• Publication Number:
  US 20050201483A1
• Time in Patent Office: Days
• US Class Current: 375/285
• CPC Class Codes: H04L 1/06 using space diversity
• CPC Class Codes: H04L 2027/0016 Stabilisation of local oscillators
• CPC Class Codes: H04L 2027/0018 Arrangements at the transmitter end
• CPC Class Codes: H04L 27/2626 Arrangements specific to the transmitter only
• CPC Class Codes: H04L 27/364 Arrangements for overcoming imperfections in the modulator, e.g. quadrature error or unbalanced I and Q levels
• CPC Class Codes: H04L 27/368 adaptive predistortion

Abstract

A processing device and method for an error adjustment system for equalizing transmission characteristics of N signal processing circuitries according to N signal branches (N>1) are disclosed. An original complex IQ signal of a signal branch of N signal branches and a processed real signal of the signal branch are received. A processed complex IQ signal of the signal branch is calculated from the processed real signal and the original complex IQ signal of the signal branch. Then, a difference between the processed complex IQ signal and the original complex IQ signal is calculated. Finally, control values of a correction function of the signal branch are calculated on the basis of the calculated difference. The calculated control values are supplied to the correction function of the signal branch. The receiving, calculating and supplying operations are performed for all N signal branches.

Claims

1. An error adjustment system for equalizing transmission characteristics of N signal processing circuitries according to N signal branches (N>

1), the system comprising;

generating means for generating an original complex IQ signal for N signal branches;

N error correction means according to the N signal branches, each for performing error correction on the original complex IQ signal of a respective signal branch by means of a correction function;

N signal processing circuitries according to the N signal branches, each for processing the corrected complex IQ signal of the respective signal branch, thereby obtaining a processed real signal of the respective signal branch; and

a processing device comprising;

receiving means for receiving an original complex IQ signal of a signal branch of the N signal branches generated by the generating means and a processed real signal of the signal branch;

first calculating means for calculating a processed complex IQ signal of the signal branch from the processed real signal and the original complex IQ signal of the signal branch;

second calculating means for calculating a difference between the processed complex IQ signal and the original complex IQ signal;

third calculating means for calculating control values of a correction function of the signal branch on the basis of the difference calculated by the second calculating means; and

supplying means for supplying the control values calculated by the third calculating means to the correction function of the signal branch,

wherein the receiving means, the first to third calculating means and the supplying means are configured to repeat their operations for all N signal branches.

2. The system according to claim 1, further comprising:

N detecting means according to the N signal branches, for detecting an envelope of the processed real signal,

wherein the receiving means of the processing device are configured to receive the original complex IQ signal of the signal branch generated by the generating means and the envelope of the processed real signal of the signal branch, and

wherein the first calculating means are configured to calculate a processed complex IQ signal of the signal branch from the envelope of the processed real signal and the original complex IQ signal of the signal branch.

3. The system according to claim 2, wherein the first calculating means are configured to calculate an envelope of the original complex IQ signal of the signal branch and to comparing the envelope of the processed real signal with the envelope of the original IQ signal at two consecutive time instances, thereby obtaining a processed complex IQ signal.

4. The system according to claim 3, wherein the processing device further comprises synchronizing means for synchronizing the envelope of the processed real signal and the original complex IQ signal of the signal branch, and the first calculating means are configure to compare the envelope of the processed real signal synchronized with the original complex IQ signal with the envelope of the original IQ signal at two consecutive time instances, thereby obtaining a processed complex IQ signal.

5. The system according to claim 1, wherein the third calculating means are configured to approximate a gradient of the difference calculated by the second calculating means on the basis of the difference and an approximation of a transmission characteristic of the signal processing circuitry of the signal branch, and to update control values of the correction function based on the approximated gradient, and wherein the supplying means are configured to supply the updated control values to the correction function of the signal branch.

6. A processing device for an error adjustment system for equalizing transmission characteristics of N signal processing circuitries according to N signal branches (N>

1), the device comprising;

receiving means for receiving an original complex IQ signal of a signal branch of N signal branches and receiving a processed real signal of the signal branch;

first calculating means for calculating a processed complex IQ signal of the signal branch from the processed real signal and the original complex IQ signal of the signal branch;

second calculating means for calculating a difference between the processed complex IQ signal and the original complex IQ signal;

third calculating means for calculating control values of a correction function of the signal branch on the basis of the difference calculated by the second calculating means; and

supplying means for supplying the control values calculated by the third calculating means to the correction function of the signal branch,

wherein the receiving means, the first to third calculating means and the supplying means are configured to repeat their operations for all N signal branches.

7. The processing device according to claim 6, wherein the receiving means and the supplying means are formed by a data bus, and wherein the first to third calculating means are formed by a digital signal processor.

8. The processing device according to claim 7, further comprising storage means for storing algorithms to be carried out by the digital signal processor.

9. An error adjustment method of equalizing transmission characteristics of N signal processing circuitries according to N signal branches, the method comprising:

a generating step of generating an original complex IQ signal for N signal branches; and

in each of the N signal branches;

a performing step of performing error correction on the original complex IQ signal by means of a correction function;

a processing step of processing the corrected complex IQ signal in a signal processing circuitry, thereby obtaining a processed real signal; and

in a processing device;

a receiving step of receiving an original complex IQ signal of a signal branch of the N signal branches generated in the generating step and a processed real signal of the signal branch;

a first calculating step of calculating a processed complex IQ signal of the signal branch from the processed real signal and the original complex IQ signal of the signal branch;

a second calculating step of calculating a difference between the processed complex IQ signal and the original complex IQ signal;

a third calculating step of calculating control values of a correction function of the signal branch on the basis of the difference calculated in the second calculating step;

a supplying step of supplying the control values calculated in the third calculating step to the correction function of the signal branch; and

a repeating step of repeating the steps performed in the processing device for all N signal branches.

10. The method according to claim 9, further comprising:

in each of the N signal branches;

a detecting step of detecting an envelope of the processed real signal,

wherein the receiving step comprises receiving the original complex IQ signal of the signal branch generated in the generating step and the envelope of the processed real signal of the signal branch, and

wherein the first calculating step comprises calculating a processed complex IQ signal of the signal branch from the envelope of the processed real signal and the original complex IQ signal of the signal branch.

11. The method according to claim 10, wherein the first calculating step comprises:

calculating an envelope of the original complex IQ signal of the signal branch; and

comparing the envelope of the processed real signal with the envelope of the original IQ signal at two consecutive time instances, thereby obtaining a processed complex IQ signal.

12. The method according to claim 11, further comprising:

in the processing device;

a synchronizing step of synchronizing the envelope of the processed real signal and the original complex IQ signal of the signal branch,

wherein the envelope of the processed real signal synchronized with the original complex IQ signal is compared with the envelope of the original IQ signal at two consecutive time instances, thereby obtaining a processed complex IQ signal.

13. The method according to claim 9, wherein the third calculating step comprises:

approximating a gradient of the difference calculated in the second calculating step on the basis of the difference and an approximation of a transmission characteristic of the signal processing circuitry of the signal branch; and

updating control values of the correction function based on the approximated gradient; and

the supplying step comprises supplying the updated control values to the correction function of the signal branch.

14. A method of equalizing transmission characteristics of N signal processing circuitries according to N signal branches, the method comprising:

a first calculating step of calculating a processed complex IQ signal of a signal branch of N signal branches from a processed real signal and an original complex IQ signal of the signal branch;

a second calculating step of calculating a difference between the processed complex IQ signal and the original complex IQ signal;

a third calculating step of calculating control values of a correction function of the signal branch on the basis of the difference calculated in the second calculating step; and

a repeating step for repeating the first to third calculating steps for all N signal branches.

15. A computer program product for a computer, comprising software code portions for performing the following steps when the program is run on the computer:

a first calculating step of calculating a processed complex IQ signal of a signal branch of N signal branches from a processed real signal and an original complex IQ signal of the signal branch;

a second calculating step of calculating a difference between the processed complex IQ signal and the original complex IQ signal;

a third calculating step of calculating control values of a correction function of the signal branch on the basis of the difference calculated in the second calculating step; and

a repeating step for repeating the first to third calculating steps for all N signal branches.

16. The computer program product according to claim 15, wherein the computer program product comprises a computer-readable medium on which the software code portions are stored.

17. The computer program product according to claim 15, wherein the computer program product is directly loadable into an internal memory of the computer.