Imaging device with multiple fields of view incorporating memory-based temperature compensation of an uncooled focal plane array

• US 20050205785A1
• Filed: 01/31/2005
• Published: 09/22/2005
• Est. Priority Date: 05/11/2001
• Status: Active Grant

• Current Assignee: Aprolase Development Co LLC (Intellectual Ventures LLC)
• Original Assignee: Irvine Sensors Corp.
• Inventors: Boyd, W. Eric, Carlson, Randolph, Hornback, Bert, Harwood, Doug
• Granted Patent: US 7,235,785 B2
• Time in Patent Office: Days
• US Class Current: 250/332
• CPC Class Codes: G01J 5/22 Electrical features thereof
• CPC Class Codes: H04N 25/672 between adjacent sensors or output registers for reading a single image
• CPC Class Codes: H04N 25/673 by using reference sources
• CPC Class Codes: H04N 5/33 Transforming infrared radiation cameras or camera modules for generating image signals from infrared radiation H04N23/20; circuitry of SSIS for transforming infrared radiation into image signals H04N25/20

Abstract

A plurality of temperature dependent focal plane arrays operate without a temperature stabilization cooler and/or heater over a wide range of ambient temperatures. Gain, offset and/or bias correction tables are provided in a flash memory in memory pages indexed by the measured temperature of the focal plane arrays. The memory stores a calibration database, which is accessed using a logic circuit which generates a memory page address from a digitized temperature measurement of each of the focal plane array. The calibration database is comprised of an array of bias, gain and offset values for each pixel in the focal plane array for each potential operating temperature over the entire range of potential operating temperatures. The bias, gain and offset data within the database are read out, converted to analog form, and used by analog circuits to correct the focal plane array response. The output of each of the FPAs is multiplexed to a shared processing module and calibration data for each of the FPAs is accessed from the shared processing module.

Claims

1. An apparatus comprising:

a plurality of focal plane arrays, each of said focal plane arrays having a plurality of pixel locations;

memory having a plurality of memory locations in which operating parameters of each pixel location are stored;

means for measuring the temperature of each of said focal plane arrays;

a shared processing module comprised of a logic circuit coupled to said temperature measuring means for converting a measured temperature of each of said focal plane arrays to an address, said logic circuit coupled to said memory to read said operating parameters of each of said pixel locations from said memory;

a read-out circuit coupled to each of said focal plane arrays for measuring radiant energy incident on said pixel locations; and

a processing circuit coupled to said logic circuit and to said read-out circuit for processing said operating parameters of each pixel location from said memory device with said measured radiant energy incident on said addressed pixel location to provide a temperature compensated measurement for each of said pixel locations and,

multiplexing circuitry coupled between each of said focal plane arrays and said shared processing module for the multiplexing of an electronic signal between said focal plane arrays and said shared processing module.

2. The apparatus of claim 1 wherein the means for measuring temperature comprises a thermistor.

3. The apparatus of claim 1 where said logic circuit reads out said operating parameters of said pixel locations from said memory by reading out gain, g.sub.j(T), and offset, Z.sub.j,0(T), for each pixel location, j, for said measured temperature, T, of said focal plane arrays.

4. The apparatus of claim 1 wherein said processing circuit processes said operating parameters of each pixel location from said memory with said measured radiant energy incident on said addressed pixel location to provide a temperature compensated measurement comprises performing the operation given by Z.sub.j(T, I)=g.sub.j(T)[Z.sub.j(T, I)+Z.sub.j,0(T)] in said analog or digital circuit, where Z.sub.j is the output of the jth pixel location, T is temperature of each of said focal plane arrays, I is the intensity of the incident radiant energy, g.sub.j is the gain of the jth pixel location at temperature T and Z.sub.j,0 is an offset value associated with the jth pixel location at temperature T.

5. The apparatus of claim 1 where said read-out circuit reads said pixel locations in each of said focal plane arrays in a predetermined order and where said logic converter reads out said operating parameters of said pixel locations from said memory in said predetermined order.

6. The apparatus of claim 1 where said logic converter addresses said memory locations in which operating parameters of each pixel location are stored by addressing said memory locations corresponding to temperature increments across a temperature operating band each of said focal plane arrays.

7. The apparatus of claim 1 where at least one said focal plane arrays is a non-temperature stabilized focal plane array.

8. The apparatus of claim 1 where at least one said focal plane array is an uncooled focal plane array.

9. The apparatus of claim 1 further comprising a controller for composing a single still image from said temperature compensated measurement for each pixel location in said focal plane array.

10. The apparatus of claim 1 further comprising a controller for composing a sequence of images from said temperature compensated measurements for each pixel location in each of said focal plane arrays over a sequence of time.

11. The apparatus of claim 1 further comprising an infrared receiver/transceiver for receiving data from or transmitting data to said shared processing module.

12. The apparatus of claim 1 further comprising beam splitting optics for the imaging of at least two predetermined optical spectral regions upon at least two separate FPAs.