Dual doped polysilicon and silicon germanium etch

• US 20050205862A1
• Filed: 03/17/2004
• Published: 09/22/2005
• Est. Priority Date: 03/17/2004
• Status: Active Grant

• Current Assignee: Lam Research Corporation
• Original Assignee: Lam Research Corporation
• Inventors: Miyamoto, Yoshinori, Koemtzopoulos, C. Robert, Taylor, Yousun Kim, Adams, Yoko Yamaguchi
• Granted Patent: US 7,682,985 B2
• Time in Patent Office: Days
• US Class Current: 257/40
• CPC Class Codes: H01L 21/32137 of silicon-containing layers
• CPC Class Codes: H01L 21/32139 using masks
• CPC Class Codes: H01L 21/82345 gate conductors with different gate conductor materials or different gate conductor implants, e.g. dual gate structures
• CPC Class Codes: H01L 21/823842 gate conductors with different gate conductor materials or different gate conductor implants, e.g. dual gate structures

Abstract

A method for etching a stack with at least one silicon germanium layer over a substrate in a processing chamber is provided. A silicon germanium etch is provided. An etchant gas is provided into the processing chamber, wherein the etchant gas comprises HBr, an inert diluent, and at least one of O₂ and N₂. The substrate is cooled to a temperature below 40° C. The etching gas is transformed to a plasma to etch the silicon germanium layer.

Claims

1. A method for etching a stack with at least one silicon germanium layer over a substrate in a processing chamber, comprising providing a silicon germanium etch, comprising:

providing an etchant gas into the processing chamber, wherein the etchant gas comprises HBr, an inert diluent, and at least one of O₂ and N₂;

cooling the substrate to a temperature below 40°

C.; and

transforming the etching gas to a plasma to etch the silicon germanium layer.

2. The method, as recited in claim 1, wherein the stack further comprises a polysilicon layer over the silicon germanium layer, wherein at least one region of the polysilicon layer is doped, further comprising providing a break through etch of the polysilicon layer, comprising:

providing an etchant gas into the processing chamber, wherein the etchant gas comprises N₂, SF₆, and at least one of CHF₃ and CH₂F₂; and

transforming the etching gas to a plasma to etch the polysilicon layer.

3. The method, as recited in claim 2, further comprising providing a polysilicon main etch, comprising:

providing an etchant gas with at least one of Cl₂, HBr, CF₄, and O₂; and

transforming the etching gas to a plasma to etch the polysilicon layer.

4. The method, as recited in claim 3, wherein the etching the silicon germanium layer and the polysilicon layer provides a vertical profile.

5. The method, as recited in claim 4, wherein the stack further comprises a seed silicon layer under the silicon germanium layer, wherein the SiGe etch etches through the seed silicon layer.

6. The method, as recited in claim 5, wherein combined thicknesses of the seed silicon layer and silicon germanium layer is between 10 and 50 nanometers.

7. The method, as recited in claim 6, further comprising providing a photoresist mask over the stack.

8. The method, as recited in claim 7, wherein the photoresist mask is of a 193 or higher generation photoresist.

9. The method, as recited in claim 4, wherein the polysilicon layer has at least one undoped region.

10. The method, as recited in claim 1, wherein combined thicknesses of the seed silicon layer and silicon germanium layer is less than half a thickness of the polysilicon layer.

11. The method, as recited in claim 1, wherein the stack further comprises a seed silicon layer under the silicon germanium layer, wherein the SiGe etch etches through the seed silicon layer.

12. The method, as recited in claim 11, wherein combined thicknesses of the seed silicon layer and silicon germanium layer is between 10 and 50 nanometers.

13. The method, as recited in claim 1, further comprising providing a photoresist mask over the stack.

14. The method, as recited in claim 13, wherein the photoresist mask is of a 193 or higher generation photoresist.

15. A semiconductor device formed by the method of claim 1.

16. A method of etching a polysilicon layer over a substrate, wherein the polysilicon layer has at least one doped region, comprising:

placing the substrate in a processing chamber;

providing an etchant gas into the processing chamber, wherein the etchant gas comprises N₂, SF₆, and at least one of CHF₃ and CH₂F₂; and

transforming the etching gas to a plasma to etch the polysilicon layer.

17. The method, as recited in claim 16, further comprising providing a polysilicon main etch, comprising:

providing an etchant gas with at least one of Cl₂, HBr, CF₄, and O₂; and

transforming the etching gas to a plasma to etch the polysilicon layer.

18. The method, as recited in claim 17, further comprising providing a photoresist mask over the stack.

19. The method, as recited in claim 18, wherein the photoresist mask is of a 193 or higher generation photoresist.

20. The method, as recited in claim 16, wherein the polysilicon layer has at least one undoped region.

21. A semiconductor device formed by the method of claim 16.

22. An apparatus for etching a stack with at least one silicon germanium layer over a substrate, comprising:

a processing chamber;

a gas source;

an energizing source;

a temperature control device, for controlling the temperature of the substrate;

a controller, wherein the controller comprises, computer readable media comprising;

computer readable code for providing an etchant gas from the gas source into the processing chamber, wherein the etchant gas comprises HBr, an inert diluent, and at least one of O₂ and N₂;

computer readable code for cooling the substrate to a temperature below 40°

C.; and

computer readable code for using the energizing source to transform the etching gas to a plasma to etch the silicon germanium layer.