High Temperature embedded charge devices and methods thereof

• US 20050205966A1
• Filed: 02/17/2005
• Published: 09/22/2005
• Est. Priority Date: 02/19/2004
• Status: Active Grant

• Current Assignee: Rochester Institute of Technology
• Original Assignee: Rochester Institute of Technology
• Inventors: Potter, Michael D.
• Granted Patent: US 8,581,308 B2
• Time in Patent Office: Days
• US Class Current: 257/532
• CPC Class Codes: H01L 29/513 the variation being perpendicular to the channel plane
• CPC Class Codes: H01L 29/66833 with a charge trapping gate insulator, e.g. MNOS transistors
• CPC Class Codes: H01L 29/792 with charge trapping gate insulator, e.g. MNOS-memory transistors

Abstract

A device for storing embedded charge includes a first insulator and at least one second insulator. The first insulator has at least two outer surfaces and has a band gap of less than about 5.5 eV. The second insulator is deposited on at least each of the at least two outer surfaces of the first insulator to form at least one interface for storing charge between the first and second insulators. The second insulator has a band gap of more than about 6.0 eV.

Claims

1. A device for storing embedded charge comprising:

a first insulator having at least two outer surfaces, the first insulator having a band gap of less than about 5.5 eV; and

at least one second insulator on at least each of the at least two outer surfaces of the first insulator to form at least one interface for storing charge between the first and second insulators, the second insulator having a band gap of more than about 6.0 eV.

2. The device as set forth in claim 1 wherein the first insulator is selected from a group consisting of Si₃N₄, TiO₂, SrTiO₃, ZrO₂, and BaTiO₃ and the second insulator is selected from a group consisting of SiO₂, CaF₂ MgF₂, LiF, and Al₂O₃.

3. The device as set forth in claim 1 wherein the second insulator comprises at least two layers, each of the layers of the second insulator are on a different one of the outer surfaces of the first insulator.

4. The device as set forth in claim 1 wherein the second insulator substantially encases the first insulator.

5. The device as set forth in claim 1 further comprising a fixed, static electronic charge on the order of at least 1×

10¹⁰ charges/cm² stored at at least one of the interfaces.

6. The device as set forth in claim 1 wherein a permittivity of the second insulator is lower than a permittivity of the first insulator.

7. A method for making a device for storing embedded charge, the method comprising:

providing a first insulator having at least two outer surfaces, the first insulator having a band gap of less than about 5.5 eV; and

depositing at least one second insulator on at least each of the at least two outer surfaces of the first insulator to form at least one interface for storing charge between the first and second insulators, the second insulator having a band gap of more than about 6.0 eV.

8. The method as set forth in claim 7 wherein the first insulator is selected from a group consisting of Si₃N₄, TiO₂, SrTiO₃, ZrO₂, and BaTiO₃ and the second insulator is selected from a group consisting of SiO₂, CaF₂ MgF₂, LiF, and Al₂O₃.

10. The method as set forth in claim 7 wherein the depositing at least one second insulator further comprises substantially encasing the first insulator with the second insulator.

11. The method as set forth in claim 7 further comprising embedding a fixed, static electronic charge on the order of at least 1×

10¹⁰ charges/cm² into at least one of the interfaces.

12. The method as set forth in claim 7 wherein a permittivity of the second insulator is lower than a permittivity of the first insulator.

9. The method as set forth in 7 wherein the second insulator comprises at least two layers, each of the layers of the second insulator is deposited on a different one of the outer surfaces of the first insulator.

13. A device for storing embedded charge comprising:

a first insulator having a band gap of less than about 5.5 eV; and

at least one second insulator which substantially encases the first insulator to form at least one interface for storing charge, the second insulator having a band gap of more than about 6.0 eV.

14. The device as set forth in claim 13 wherein the first insulator is selected from a group consisting of Si₃N₄, TiO₂, SrTiO₃, ZrO₂, and BaTiO₃ and the second insulator is selected from a group consisting of SiO₂, CaF₂ MgF₂, LiF, and Al₂O₃.

15. The device as set forth in claim 13 further comprising a fixed, static electronic charge on the order of at least 1×

10¹⁰ charges/cm² stored at at least one of the interfaces.

16. The device as set forth in claim 13 wherein a permittivity of the second insulator is lower than a permittivity of the first insulator.

17. A method for making a device for storing embedded charge, the method comprising:

providing a first insulator having a band gap of less than about 5.5 eV; and

substantially encasing the first insulator with at least one second insulator to form at least one interface for storing charge between the first and second insulators, the second insulator having a band gap of more than about 6.0 eV.

18. The method as set forth in claim 17 wherein the first insulator is selected from a group consisting of Si₃N₄, TiO₂, SrTiO₃, ZrO₂, and BaTiO₃ and the second insulator is selected from a group consisting of SiO₂, CaF₂ MgF₂, LiF, and Al₂O₃.

19. The method as set forth in claim 17 further comprising embedding a fixed, static electronic charge on the order of at least 1×

10¹⁰ charges/cm² into at least one of the interfaces.

20. The method as set forth in claim 17 wherein a permittivity of the second insulator is lower than a permittivity of the first insulator.