Bank selectable parallel test circuit and parallel test method thereof
First Claim
1. A bank selectable parallel test circuit comprising:
- a bank selecting control unit for outputting a test mode control signal for selecting a test mode in response to a parallel test signal for controlling a parallel test and a compression test signal for controlling bank selection in the parallel test; and
a plurality of bank selecting units, corresponding one by one to banks, for selectively activating the corresponding banks in response to the test mode control signal and a bank selecting control signal to selectively test a specific bank even in a parallel test mode.
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Accused Products
Abstract
A parallel test circuit performs a selective test on a specific bank. The bank selectable parallel test circuit comprises a bank selecting control unit and a plurality of bank selecting units. The bank selecting control unit outputs a test mode control signal for selecting a test mode in response to a parallel test signal for controlling a parallel test and a compression test signal for controlling bank selection in the parallel test. Each of the plurality of bank selecting units, which correspond one by one to banks, selectively activates the corresponding banks in response to the test mode control signal and a bank selecting control signal.
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Citations
19 Claims
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1. A bank selectable parallel test circuit comprising:
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a bank selecting control unit for outputting a test mode control signal for selecting a test mode in response to a parallel test signal for controlling a parallel test and a compression test signal for controlling bank selection in the parallel test; and
a plurality of bank selecting units, corresponding one by one to banks, for selectively activating the corresponding banks in response to the test mode control signal and a bank selecting control signal to selectively test a specific bank even in a parallel test mode. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)
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16. A parallel test method comprising the steps of:
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performing a logic operation on a parallel test signal for controlling a parallel test and a compression test signal for controlling bank selection to output a test mode control signal;
activating all bank selecting signals when the test mode control signal is activated to simultaneously select all banks, and activating a bank selecting signal corresponding to a specific bank in response to a bank selecting control signal when the test mode control signal is inactivated to select a corresponding bank; and
and writing/reading data in the selected bank to test the selected bank. - View Dependent Claims (17, 18, 19)
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Specification