High frequency circuit block unit, method for producing same, high frequency module device and method for producing same

• US 20050208914A1
• Filed: 05/23/2005
• Published: 09/22/2005
• Est. Priority Date: 11/26/2001
• Status: Abandoned Application

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Ogawa, Tsuyoshi
• Application Number:
  US11/135,103
• Publication Number:
  US 20050208914A1
• Time in Patent Office: Days
• US Class Current: 455/193.100
• CPC Class Codes: H01L 21/4857 Multilayer substrates multilayer metallisation on monolayer substrate H01L21/4846
• CPC Class Codes: H01L 21/6835 using temporarily an auxiliary support
• CPC Class Codes: H01L 2221/68345 used as a support during the manufacture of self supporting substrates
• CPC Class Codes: H01L 2221/68359 used as a support during manufacture of interconnect decals or build up layers
• CPC Class Codes: H01L 2221/68363 used in a transfer process involving transfer directly from an origin substrate to a target substrate without use of an intermediate handle substrate
• CPC Class Codes: H01L 2224/0401 Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/73253 Bump and layer connectors
• CPC Class Codes: H01L 2224/81801 Soldering or alloying
• CPC Class Codes: H01L 23/49822 Multilayer substrates multilayer metallisation on monolayer substrate H01L23/498
• CPC Class Codes: H01L 23/552 Protection against radiation, e.g. light or electromagnetic waves
• CPC Class Codes: H01L 23/66 High-frequency adaptations
• CPC Class Codes: H01L 24/81 using a bump connector
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01013 Aluminum [Al]
• CPC Class Codes: H01L 2924/01024 : Chromium [Cr]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01038 : Strontium [Sr]
• CPC Class Codes: H01L 2924/01056 : Barium [Ba]
• CPC Class Codes: H01L 2924/01073 : Tantalum [Ta]
• CPC Class Codes: H01L 2924/01075 : Rhenium [Re]
• CPC Class Codes: H01L 2924/01076 : Osmium [Os]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/09701 : Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/14 : Integrated circuits
• CPC Class Codes: H01L 2924/16152 : Cap comprising a cavity for hosting the device, e.g. U-shaped cap
• CPC Class Codes: H01L 2924/19041 : being a capacitor
• CPC Class Codes: H01L 2924/19042 : being an inductor
• CPC Class Codes: H01L 2924/19043 : being a resistor
• CPC Class Codes: H01L 2924/19105 : in a side-by-side arrangement on a common die mounting substrate
• CPC Class Codes: H01L 2924/19107 : off-chip wires
• CPC Class Codes: H01L 2924/30105 : Capacitance
• CPC Class Codes: H01L 2924/30107 : Inductance
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding
• CPC Class Codes: H04B 1/52 : Hybrid arrangements, i.e. arrangements for transition from single-path two-direction transmission to single-direction transmission on each of two paths or vice versa
• CPC Class Codes: H05K 1/0237 : High frequency adaptations H05K1/0216 takes precedence
• CPC Class Codes: H05K 1/141 : One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters H05K1/142 and H05K1/147 take precedence
• CPC Class Codes: H05K 1/16 : incorporating printed electric components, e.g. printed resistor, capacitor, inductor
• CPC Class Codes: H05K 2201/0352 : Differences between the conductors of different layers of a multilayer
• CPC Class Codes: H05K 2201/09972 : Partitioned, e.g. portions of a PCB dedicated to different functions; Boundary lines therefore; Portions of a PCB being processed separately or differently
• CPC Class Codes: H05K 2203/016 : Temporary inorganic, non-metallic carrier, e.g. for processing or transferring
• CPC Class Codes: H05K 2203/061 : of previously made multilayered subassemblies laminating only or mainly similar single-sided circuit boards H05K3/4617; laminating only or mainly similar double-sided circuit boards H05K3/462
• CPC Class Codes: H05K 3/007 : Manufacture or processing of a substrate for a printed circuit board supported by a temporary or sacrificial carrier H05K1/187, H05K3/20 and H05K3/4682 take precedence
• CPC Class Codes: H05K 3/4614 : the electrical connections between the circuit boards being made during lamination
• CPC Class Codes: H05K 3/4644 : by building the multilayer layer by layer, i.e. build-up multilayer circuits making via holes in the insulating layers H05K3/0011; special circuit boards as base or core whereon the multilayer is built H05K3/4602
• CPC Class Codes: H05K 3/4682 : Manufacture of core-less build-up multilayer circuits on a temporary carrier or on a metal foil
• CPC Class Codes: H05K 3/4694 : Partitioned multilayer circuits having adjacent regions with different properties, e.g. by adding or inserting locally circuit layers having a higher circuit density H05K3/4691 takes precedence

Abstract

A high frequency module device having a high frequency circuit block unit including a passive device. A plural number of unit wiring layers, each formed by an insulating layer, having a passive device unit in its portion, and by a pattern wiring, are layered on a dummy substrate, and are released from the dummy substrate to form the high frequency circuit block unit (2), which is mounted on a motherboard (3). The major surfaces of the respective unit wiring layers are planarized. The passive device unit and the pattern wiring, formed on the major surface of each unit wiring layer in the high frequency circuit block unit (2), can be formed with high accuracy to improve high frequency characteristics. The high frequency circuit block unit (2) is not in need of a base substrate, thus achieves reduction in size and cost.

Claims

1-4. -4. (canceled)

5. A method for producing a high frequency circuit block unit comprising:

a release layer forming step of forming a release layer on a dummy substrate;

a layering step of layering a plurality of unit wiring layers on said release layer so that wiring layers of said unit wiring layers, each including a passive device and a connection land unit in a portion thereof, and each formed embedded in the major surface of an insulating layer, are electrically interconnected;

a planarizing step of planarizing the major surfaces of said plural unit wiring layers in their entirety; and

a substrate removing step of peeling off said plural unit wiring layers from said release layer for removing said dummy substrate and the release layer.

6. The method for producing the high frequency circuit block unit according to claim 5 wherein, in said planarizing step, the major surface of each of said plural unit wiring layers is planarized by chemical mechanical polishing.

7. The method for producing a high frequency circuit block unit according to claim 5 further comprising, subsequent to said substrate removing step, a semiconductor chip mounting step of mounting a semiconductor chip on the major surface of said plural unit wiring layers neighboring to said release layer and/or on the major surface of the uppermost layer above said release layer, a resin layer forming step of forming a resin layer for covering said semiconductor chip so that said semiconductor chip is partially exposed, and a polishing step of polishing said semiconductor chip and said resin layer.

8-11. -11. (canceled)

12. A method for producing a high frequency module device comprising:

a block unit forming step of forming a high frequency block unit by a release layer forming step of forming a release layer on a dummy substrate, a layering step of layering a plurality of unit wiring layers on said release layer, each of said unit wiring layers including a wiring layer formed embedded in the major surface of an insulating layer, said wiring layer including a passive device and a connection land unit in a portion thereof, said wiring layers of said unit wiring layers being electrically, interconnected, a planarizing step of planarizing the major surfaces of said plural unit wiring layers in their entirety, and a substrate removing step of peeling off said plural unit wiring layers from said release layer for removing said dummy substrate and the release layer, and a block unit mounting step of mounting said high frequency circuit block unit on a major surface of a motherboard, having a connecting portion exposed from a major surface thereof, as said connecting land unit and said connecting portion are electrically interconnected.

13. The method for producing a high frequency module device according to claim 12 wherein, in said planarizing step of said block unit forming step, the major surfaces of said plural unit wiring layers are each planarized by chemical-mechanical polishing.

14. The method for producing a high frequency module device according to claim 12 wherein, in said block unit forming step, said high frequency circuit block unit is formed by executing, subsequent to said substrate removing step, a semiconductor chip mounting step of mounting a semiconductor chip on the major surface of said plural unit wiring layers neighboring to said release layer and/or on the major surface of the uppermost layer above said release layer, a resin layer forming step of forming a resin layer for covering said semiconductor chip so that said semiconductor layer is partially exposed, and a polishing step of polishing said semiconductor chip and said resin layer.