Method and system for generating test pulses to test electronic elements
First Claim
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1. A method for generating test pulses to test an electronic element, comprising:
- determining a transmission clock, a serial of predetermined pulses, and a test clock corresponding to the serial of predetermined pulses, wherein said serial of predetermined pulses are sent to said electronic element and the frequency of said transmission clock is higher than the frequency of said test clock;
generating a plurality of serial data bits, wherein said serial data bits are generated from said serial of predetermined pulses and said transmission clock;
transforming said serial data bits into a serial data stream; and
sending said serial data stream to said electronic element, wherein said data stream is transmitted in a specific frequency to send a specific number of bits for forming said serial of predetermined pulses according to said transmission clock.
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Abstract
A method and system for generating test pulses to test electronic elements are disclosed. After determining a transmission clock, which is smaller than a test clock, and a serial of predetermined pulses, the serial of data bits corresponding to the serial of predetermined pulses can be generated. Then the serial of data bits can be transformed into a serial data stream for transmission. By transmitting the serial data stream according to the transmission clock, the serial of predetermined pulses corresponding to the test clock can be generated.
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Citations
22 Claims
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1. A method for generating test pulses to test an electronic element, comprising:
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determining a transmission clock, a serial of predetermined pulses, and a test clock corresponding to the serial of predetermined pulses, wherein said serial of predetermined pulses are sent to said electronic element and the frequency of said transmission clock is higher than the frequency of said test clock;
generating a plurality of serial data bits, wherein said serial data bits are generated from said serial of predetermined pulses and said transmission clock;
transforming said serial data bits into a serial data stream; and
sending said serial data stream to said electronic element, wherein said data stream is transmitted in a specific frequency to send a specific number of bits for forming said serial of predetermined pulses according to said transmission clock. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A system for generating test pulses to test an electronic element, comprising:
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a clock generator to generate a transmission clock and a test clock for an electronic element, wherein the frequency of said transmission clock being higher than the frequency of said test clock;
a storage unit to store a serial of data bits, wherein said serial of data bits being generated from a serial of predetermined pulses and said transmission clock;
a transformation unit, wherein said serial of data bits being retrieved from said storage unit and transformed into a serial data stream by said transformation unit; and
a transmission unit to transmit said serial data stream, wherein said serial of predetermined pulses being generated according to the fixed number of bits of said serial data stream in the fixed frequency of said transmission clock. - View Dependent Claims (10, 11, 12, 13, 14, 15, 16)
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17. A programmable latch array with serializer for generating test pulses to test an electronic element, comprising:
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an apparatus comprising a programmable latch array with a serializer for generating a test clock and a transmission clock to said electronic element and said serializer, respectively, and for storage of a serial of data bits which is generated from said transmission clock and a serial of predetermined pulses corresponding to said test clock, wherein the frequency of said transmission clock being higher than the frequency of said test clock; and
a transformation unit, wherein said serial of data bits retrieved by said transformation unit being transmitted by said serializer, and said serial of predetermined pulses being generated according to the fixed number of bits of said serial of data bits in the fixed frequency of said transmission clock. - View Dependent Claims (18, 19, 20, 21, 22)
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Specification