Hybrid branch prediction

• US 20050210225A1
• Filed: 03/22/2004
• Published: 09/22/2005
• Est. Priority Date: 03/22/2004
• Status: Abandoned Application

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Morrow, Michael W.
• Application Number:
  US10/805,947
• Publication Number:
  US 20050210225A1
• Time in Patent Office: Days
• US Class Current: 712/239
• CPC Class Codes: G06F 9/3844 using dynamic branch prediction, e.g. using branch history tables
• CPC Class Codes: G06F 9/3846 using static prediction, e.g. branch taken strategy

Abstract

A hybrid branch predictor capable of performing static and dynamic branch prediction operates in a single pipeline stage.

Claims

1. A method comprising:

performing a static branch prediction for a branch; and

overriding the static branch prediction with a dynamic branch prediction when the static branch prediction has previously been incorrect;

wherein the static branch prediction and dynamic branch prediction are performed in a single pipeline stage.

2. The method of claim 1 wherein the static branch prediction comprises predicting taken or not taken based on a direction of the branch.

3. The method of claim 2 wherein predicting taken or not taken comprises predicting based on a displacement field of a branch instruction.

4. The method of claim 1 wherein the static branch prediction comprises:

determining the direction of the branch; and

if the direction of the branch is backward, then predict taken.

5. The method of claim 1 wherein the dynamic branch prediction is performed by a dynamic branch predictor having fewer than 16 entries.

6. The method of claim 1 further comprising:

overriding the static branch prediction with a dynamic branch prediction when the dynamic branch prediction has previously been incorrect.

7. The method of claim 1 further comprising updating the dynamic branch prediction when the static branch prediction is incorrect.

8. A processor comprising:

a static branch predictor to statically predict whether a branch is taken or not taken based on a direction of the branch; and

a dynamic branch predictor to conditionally override the static branch predictor.

9. The processor of claim 8 wherein the static branch predictor includes a circuit to predict the branch will be taken when the direction of the branch is backward.

10. The processor of claim 8 wherein the static branch predictor includes a circuit to predict the branch will be taken when the direction of the branch is forward.

11. The processor of claim 8 wherein the dynamic branch predictor includes a plurality of entries to hold branch prediction information for branches having had incorrect static predictions.

12. The processor of claim 11 further comprising a branch execution unit to determine the correctness of the branch prediction, and to conditionally update at least one of the plurality of entries in the dynamic branch predictor.

13. The processor of claim 8 wherein the static branch predictor and the dynamic branch predictor are coupled to operate in a single pipeline stage.

14. A processor comprising:

a static branch predictor to statically predict whether a branch is taken or not taken in one pipeline stage; and

a dynamic predictor to conditionally override the static branch predictor in the one pipeline stage.

15. The processor of claim 14 wherein the static branch predictor includes a circuit to predict whether the branch is taken based on a displacement field in a branch instruction.

16. The processor of claim 14 wherein the static branch predictor includes a circuit to predict the branch will be taken when the direction of the branch is backward.

17. The processor of claim 14 wherein the static branch predictor includes a circuit to predict the branch will be taken when the direction of the branch is forward.

18. The processor of claim 14 wherein the dynamic branch predictor is configured to provide a branch prediction only when previous static predictions have been incorrect.

19. The processor of claim 14 wherein the dynamic branch predictor includes a table for entries corresponding to previously incorrect static branch predictions.

20. The processor of claim 14 further comprising a branch execution unit to determine the correctness of the branch prediction, and to conditionally update the dynamic branch predictor.

21. An electronic system comprising:

first and second antennas;

an amplifier to amplify communications signals received by the first antenna; and

a processor coupled to the amplifier, the processor including a static branch predictor to statically predict whether a branch is taken or not taken based on a direction of the branch, and a dynamic branch predictor to conditionally override the static branch predictor.

22. The electronic system of claim 21 wherein the static branch predictor includes a circuit to predict the branch will be taken when the direction of the branch is backward.

23. The electronic system of claim 21 wherein the dynamic branch predictor includes a plurality of entries to hold branch prediction information for branches having had incorrect static predictions.

24. The electronic system of claim 23 wherein the processor further comprises a branch execution unit to determine the correctness of the branch prediction, and to conditionally update at least one of the plurality of entries in the dynamic branch predictor.

25. The electronic system of claim 21 wherein the static branch predictor and the dynamic branch predictor are coupled to operate in a single pipeline stage.