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Transistor with reduced gate-to-source capacitance and method therefor

  • US 20050212064A1
  • Filed: 03/24/2004
  • Published: 09/29/2005
  • Est. Priority Date: 03/24/2004
  • Status: Active Grant
First Claim
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1. A semiconductor device, comprising:

  • an active region in a semiconductor substrate;

    a gate finger over a channel in the active region and spaced from the channel by a gate dielectric having a first thickness, wherein the gate finger is of a first material;

    a first gate tab adjacent to the gate finger, over the active region and spaced from the substrate by a first tab insulator having a second thickness, wherein the first gate tab is of the first material and the second thickness is greater than the first thickness, wherein the first material is conductive;

    a second gate tab adjacent to the gate finger, over the active region and spaced from the substrate by a second tab insulator having the second thickness, wherein the second gate tab is of the first material;

    a first tab connection electrically connecting the first gate tab to the gate finger, wherein the first tab connection is of the first material;

    a second tab connection electrically connecting the second gate tab to the gate finger, wherein the second gate tab is of the first material; and

    a gate bus electrically connected to the first and second gate tabs.

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