Chip circuit comprising an inductor

• US 20050212084A1
• Filed: 12/10/2004
• Published: 09/29/2005
• Est. Priority Date: 12/11/2003
• Status: Active Grant

• Current Assignee: ST-Ericcson SA (Telefonaktiebolaget LM Ericsson)
• Original Assignee: STMicroelectronics SA (STMicroelectronics NV)
• Inventors: Grange, Sebastien
• Granted Patent: US 7,233,055 B2
• Time in Patent Office: Days
• US Class Current: 257/537
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 2224/16227 the bump connector connecting to a bond pad of the item
• CPC Class Codes: H01L 23/49816 Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
• CPC Class Codes: H01L 23/5227 Inductive arrangements or effects of, or between, wiring layers other inductive arrangements H01L23/645
• CPC Class Codes: H01L 23/552 Protection against radiation, e.g. light or electromagnetic waves
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/15311 being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/1532 the connection portion being formed on the die mounting surface of the substrate
• CPC Class Codes: H01L 2924/15321 being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/3025 Electromagnetic shielding

Abstract

A chip circuit comprising a chip which comprises a semiconductor substrate and substantially plane components formed on the said substrate, among which there are an emitting component capable of emitting electromagnetic radiation and an inductor sensitive to the incident electromagnetic radiation. At least one shield, external to the chip, is placed opposite the inductor at a distance of less than 500 microns. The shield thus makes it possible to shield the sensitive inductor from the emitting component, while maintaining the quality factor of the inductor.

Claims

1. A chip circuit comprising a chip, said chip comprising at least a semiconductor substrate, substantially plane components formed on the said substrate, among which there are at least one emitting component capable of emitting electromagnetic radiation and an inductor, which is sensitive to incident electromagnetic radiation, and at least a first shield external to the chip, lying parallel to the plane of the inductor, characterized in that the said first shield is placed opposite the said inductor at a distance of less than about 500 microns, thus making it possible for the sensitive inductor to be shielded from the emitting component, while maintaining the quality factor of the inductor.

2. The chip circuit according to claim 1, wherein the distance between the plane of the inductor and the first shield is greater than or equal to 100 microns.

3. The chip circuit according to claim 1, wherein the distance between the sensitive inductor and the emitting component is greater than 1 millimetre.

4. The chip circuit according to claim 1, wherein the orthogonal projection of the first shield on the plane of the inductor includes the entire inductor.

5. The chip circuit according to claim 3, wherein the orthogonal projection of the first shield on the plane of the inductor extends beyond at least one of the edges of the inductor by at least 150 microns.

6. The chip circuit according to claim 1, wherein the chip lies parallel to a first support, the distance from the chip to the first support being determined by the diameter of bumps of a first type that are used for electrically connecting the chip to the first support, the said first shield being produced in the first support.

7. The chip circuit according to claim 1, which furthermore includes a second shield, lying parallel to the plane of the inductor and placed opposite the said inductor at a distance of between 100 and 500 microns, the first and second shields lying on either side of the inductor.

8. The chip circuit according to claim 6, in which the chip circuit furthermore includes a second support parallel to the first support, the first and second supports being located on either side of the chip, the distance from the chip to the second support being determined by the diameter of bumps of a second type that are used for electrically connecting the first support to the second support, and the said second shield being produced in the second support.

9. The chip circuit according to claim 6, characterized in that the final diameter of the bumps of the first type is 150 microns.

10. The chip circuit according to claim 8, characterized in that the final diameter of the bumps of the second type is 500 microns.

11. The chip circuit according to claim 1, which furthermore includes a second shield lying parallel to the plane of the inductor and placed opposite the said inductor, the first and second shields lying on either side of the inductor, wherein the said second shield has an annular shape and wherein the orthogonal projection of the second shield on the plane of the inductor surrounds the said inductor.

12. The chip circuit according to claim 11, in which the distance between the plane of the inductor and the second shield is less than or equal to 30 microns.

13. The chip circuit according to claim 11, wherein the orthogonal projection of the second shield on the plane of the inductor extends beyond at least one of the edges of the inductor by 0.25 mm.

14. The chip circuit according to claim 11, in which the second shield is formed on the substrate of the chip.

15. The chip circuit according to claim 1, wherein the chip comprises a VCO and the sensitive inductor is an element of the VCO.