Semiconductor package with build-up structure and method for fabricating the same

• US 20050212129A1
• Filed: 10/26/2004
• Published: 09/29/2005
• Est. Priority Date: 03/25/2004
• Status: Abandoned Application

• Current Assignee: Siliconware Precision Industries Co., Ltd. (ASE Technology Holding Co., Ltd.)
• Original Assignee: Siliconware Precision Industries Co., Ltd. (ASE Technology Holding Co., Ltd.)
• Inventors: Huang, Chih-Ming, Huang, Chien-Ping, Hsiao, Cheng-Hsu
• Application Number:
  US10/974,293
• Publication Number:
  US 20050212129A1
• Time in Patent Office: Days
• US Class Current: 257/737
• CPC Class Codes: H01L 2224/04105 Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
• CPC Class Codes: H01L 2224/12105 Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
• CPC Class Codes: H01L 2224/24226 the HDI interconnect connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the item being planar
• CPC Class Codes: H01L 2224/24227 the HDI interconnect not connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the semiconductor or solid-state body being mounted in a cavity or on a protrusion of the item
• CPC Class Codes: H01L 2224/73267 Layer and HDI connectors
• CPC Class Codes: H01L 2224/82 by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
• CPC Class Codes: H01L 2224/83 using a layer connector
• CPC Class Codes: H01L 2224/92 Specific sequence of method steps
• CPC Class Codes: H01L 2224/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 23/3128 the substrate having spherical bumps for external connection
• CPC Class Codes: H01L 23/5389 the chips being integrally enclosed by the interconnect and support structures
• CPC Class Codes: H01L 24/19 Manufacturing methods of high density interconnect preforms
• CPC Class Codes: H01L 24/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01006 Carbon [C]
• CPC Class Codes: H01L 2924/01029 Copper [Cu]
• CPC Class Codes: H01L 2924/01033 Arsenic [As]
• CPC Class Codes: H01L 2924/01082 Lead [Pb]
• CPC Class Codes: H01L 2924/01087 Francium [Fr]
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/15153 : the die mounting substrate comprising a recess for hosting the device
• CPC Class Codes: H01L 2924/15156 : Side view
• CPC Class Codes: H01L 2924/15157 : Top view
• CPC Class Codes: H01L 2924/1517 : Multilayer substrate
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/351 : Thermal stress

Abstract

A semiconductor package with a build-up structure is provided, which includes a rigid base, a rigid frame having a through hole and fixed onto the rigid base, at least one chip received in the through hole of the rigid frame, a medium filled in a gap between the chip and the rigid frame, a build-up structure formed on the chip and the rigid frame and electrically connected to the chip, and a plurality of conductive elements bonded to the build-up structure to electrically connect the chip to external devices. The use of the rigid base and rigid frame can avoid structural warpage, cracking, delamination and a popcorn effect of the semiconductor package. A method for fabricating the semiconductor package is also provided.

Claims

1. A semiconductor package with a build-up structure, comprising:

a rigid base;

a rigid frame having at least one through hole and fixed onto the rigid base;

at least one chip received in the through hole of the rigid frame and mounted on the rigid base, wherein a gap is formed between the chip and the rigid frame;

a medium filled in the gap between the chip and the rigid frame;

a build-up structure formed on the rigid frame and the chip and electrically connected to the chip; and

a plurality of conductive elements electrically connected to the build-up structure, for allowing the chip to be electrically connected to external devices.

2. The semiconductor package of claim 1, wherein the rigid frame is similar in thickness to the chip.

3. The semiconductor package of claim 1, wherein the through hole is a rectangular hole.

4. The semiconductor package of claim 3, wherein corners of the through hole are rounded or chamfered.

5. The semiconductor package of claim 1, wherein the rigid base is made of a material selected from the group consisting of glass material, metal material, and thermosetting material.

6. The semiconductor package of claim 1, wherein the rigid frame is made of a material selected from the group consisting of glass material, metal material, and thermosetting material.

7. The semiconductor package of claim 1, wherein the medium is made of a material selected from the group consisting of silica gel, epoxy resin, and polyimide resin.

8. The semiconductor package of claim 1, wherein the conductive elements are solder balls.

9. The semiconductor package of claim 1, wherein the rigid base has at least one through hole formed at a position corresponding to the chip.

10. A method for fabricating a semiconductor package with a build-up structure, comprising the steps of:

preparing a module board comprising a plurality of rigid frames arranged as an array, each of the rigid frames having at least one through hole;

fixing the module board onto a rigid base;

mounting at least one chip in each of the through holes of the rigid frames and on the rigid base, wherein a predetermined gap is formed between each of the chips and the corresponding one of the rigid frames of the module board;

filling a medium into the gaps such that each of the chips and the corresponding rigid frame are separated by the medium;

forming a build-up structure on the module board and the chips, the build-up structure being electrically connected to the chips, and electrically connecting a plurality of conductive elements to the build-up structure; and

performing a singulation process to form individual semiconductor packages with the build-up structure.

11. The method of claim 10, wherein the medium is filled into the gaps between the chips and the rigid frames by a dispensing technique.

12. The method of claim 10, wherein the rigid frame is made of a material selected from the group consisting of glass material, metal material, and thermosetting material.

13. The method of claim 10, wherein the medium is made of a material selected from the group consisting of silica gel, epoxy resin, and polyimide resin.

14. The method of claim 10, wherein the conductive elements are solder balls.

15. The method of claim 10, wherein the rigid base has at least one through hole formed at a position corresponding to each of the chips.

16. The method of claim 15, wherein the at least one chip is fixed onto the rigid base by vacuum via the corresponding through hole of the rigid base after mounting the chip in each of the through holes of the rigid frames.

17. A method for fabricating a semiconductor package with a build-up structure, comprising the steps of:

preparing a rigid base;

preparing a module board comprising a plurality of rigid frames arranged as an array, each of the rigid frames having at least one through hole;

mounting at least one chip on the rigid base at a position corresponding to each of the through holes of the rigid frames;

fixing the module board onto the rigid base such that each of the chips is received in a corresponding one of the through holes of the rigid frames, and a predetermined gap is formed between each of the chips and the corresponding rigid frame;

filling a medium into the gaps such that each of the chips and the corresponding rigid frame are separated by the medium;

forming a build-up structure on the module board and the chips, the build-up structure being electrically connected to the chips, and electrically connecting a plurality of conductive elements to the build-up structure; and

performing a singulation process to form individual semiconductor packages with the build-up structure.

18. The method of claim 17, wherein the medium is filled into the gaps between the chips and the rigid frames by a dispensing technique.

19. The method of claim 17, wherein the rigid frame is made of a material selected from the group consisting of glass material, metal material, and thermosetting material.

20. The method of claim 17, wherein the medium is made of a material selected from the group consisting of silica gel, epoxy resin, and polyimide resin.

21. The method of claim 17, wherein the conductive elements are solder balls.

22. The method of claim 17, wherein the rigid base has at least one through hole formed at a position corresponding to each of the chips.

23. The method of claim 22, wherein the at least one chip is fixed onto the rigid base by vacuum via the corresponding through hole of the rigid base after mounting the chip in each of the through holes of the rigid frames.