Distortion compensating device and power amplifying device with distortion compensating function

• US 20050212595A1
• Filed: 01/31/2005
• Published: 09/29/2005
• Est. Priority Date: 02/09/2004
• Status: Active Grant

• Current Assignee: Snaptrack Incorporated (Qualcomm, Inc.)
• Original Assignee: Sony Ericsson Mobile Communications Japan Incorporated (Sony Group Corp.)
• Inventors: Kusunoki, Shigeo, Kawakami, Katsuji
• Granted Patent: US 7,259,621 B2
• Time in Patent Office: Days
• US Class Current: 330/149
• CPC Class Codes: H03F 1/3276 using the nonlinearity inherent to components, e.g. a diode

Abstract

One divided signal divided into two by a dividing circuit is inputted to a gate of a source grounded FET through a first matching circuit. In a drain of the FET, a second harmonic having a phase and an amplitude in accordance with an impedance of the first matching circuit is generated and extracted in a band pass filter and then the amplitude is adjusted in an attenuation circuit to input to an addition circuit through a second matching circuit. In the addition circuit, the output of the second matching circuit is added to another divided signal of the dividing circuit and inputted to a power amplifier. The impedance in the first matching circuit affecting the phase of the second harmonic generated from the FET is set so that a distortion component generated in the power amplifier is compensated for by the second harmonic inputted in the addition circuit.

Claims

1. A distortion compensating device which is arranged in a previous stage of a power amplifier and compensates for distortion generated in said power amplifier, comprising:

a dividing circuit in which an input signal is divided into two and outputted to first and second output terminals;

a matching circuit in which a signal from said first output terminal of said dividing circuit is inputted and an impedance is matched;

a Field-Effect Transistor in which a source thereof is grounded and a signal from said matching circuit is inputted to a gate thereof;

a band pass filter in which a signal from a drain of said Field-Effect Transistor is inputted and only a second harmonic of said input signal is passed; and

an addition circuit in which a signal outputted from said band pass filter is added to a signal outputted from said second output terminal of said dividing circuit and said added signal is inputted to said power amplifier;

wherein said impedance in said matching circuit affecting a phase of said second harmonic generated from said Field-Effect Transistor is matched so that a distortion component generated in said power amplifier is compensated for by said second harmonic inputted in said addition circuit.

2. The distortion compensating device according to claim 1, further comprising an attenuation circuit attenuating an output of said band pass filter at a predetermined attenuation ratio.

3. The distortion compensating device according to claim 2, further comprising a second matching circuit which is arranged between said attenuation circuit and said addition circuit, and prevents said second harmonic from being reflected at an input end of said power amplifier.

4. The distortion compensating device according to claim 1, wherein said power amplifier is used for a CDMA system mobile telephone terminal.

5. A power amplifying device with a distortion compensating function, comprising:

a matching circuit in which an input signal is inputted and an impedance is matched;

a first Field-Effect Transistor in which a signal from said matching circuit is inputted to a gate thereof and a source thereof is grounded;

a dividing circuit in which a signal from a drain of said first Field-Effect Transistor is inputted and said signal is divided into two to output to first and second output terminals;

a band pass filter in which a signal from said first output terminal of said dividing circuit is inputted and only a second harmonic of said signal is passed;

an addition circuit in which a signal outputted from said band pass filter is added to a signal outputted from said second output terminal of said dividing circuit; and

a second Field-Effect Transistor in which a signal from said addition circuit is inputted to a gate thereof, a source thereof is grounded, and an output signal is generated from a drain thereof;

wherein said impedance in said matching circuit affecting a phase of said second harmonic generated from said first Field-Effect Transistor is matched so that a distortion component generated in said second Field-Effect Transistor is compensated for by said second harmonic inputted in said addition circuit.

6. The power amplifying device with a distortion compensating function according to claim 5, further comprising an attenuation circuit attenuating said output of said band pass filter at a predetermined attenuation ratio.

7. The power amplifying device with a distortion compensating function according to claim 6, further comprising a second matching circuit which is arranged between said attenuation circuit and said addition circuit, and prevents said second harmonic from being reflected at an input end of said second transistor.

8. The power amplifying device with a distortion compensating function according to claim 5, wherein said power amplifying device is used for a CDMA system mobile telephone terminal.

9. A distortion compensating device which is arranged in a previous stage of power amplifying means and compensates for distortion generated in said power amplifying means, comprising:

dividing means in which an input signal is divided into two and outputted to first and second output sections;

matching means in which a signal from said first output section of said dividing means is inputted and an impedance is matched;

harmonic generating means in which said signal from said matching means is inputted and at least a second harmonic of said signal is generated;

band pass means in which a signal from said harmonic generating means is inputted and only a second harmonic of said signal is passed; and

addition means in which a signal outputted from said band pass means is added to a signal outputted from said second output terminal of said dividing means and said added signal is inputted to said power amplifying means;

wherein said impedance in said matching means affecting a phase of said second harmonic generated from said harmonic generating means is matched so that a distortion component generated in said power amplifying means is compensated for by said second harmonic inputted in said addition means.

10. A power amplifying device with a distortion compensating function, comprising:

matching means in which an input signal is inputted and an impedance is matched;

first amplifying means in which a signal from said matching means is inputted and amplified, and at least a second harmonic of said signal is generated;

dividing means in which a signal from said first amplifying means is inputted and said signal is divided into two and outputted to first and second output sections;

band pass means in which a signal from said first output section of said dividing means is inputted and only a second harmonic of said signal is passed;

addition means in which a signal outputted from said band pass means is added to a signal outputted from said second output section of said dividing means; and

second amplifying means in which a signal from said addition means is inputted and amplified;

wherein said impedance in said matching means affecting a phase of said second harmonic generated from said first amplifying means is matched so that a distortion component generated in said second amplifying means is compensated for by the second harmonic inputted in said addition means.

11. A distortion compensating device which is arranged in a previous stage of a power amplifier and compensates for distortion generated in said power amplifier, comprising:

a dividing circuit in which an input signal is divided into two and outputted to first and second output terminals;

a matching circuit in which a signal from said first output terminal of said dividing circuit is inputted and an impedance is matched;

a Bipolar Transistor in which an emitter thereof is grounded and a signal from said matching circuit is inputted to a base thereof;

a band pass filter in which a signal from a collector of said Bipolar Transistor is inputted and only a second harmonic of said input signal is passed; and

an addition circuit in which a signal outputted from said band pass filter is added to a signal outputted from said second output terminal of said dividing circuit and said added signal is inputted to said power amplifier;

wherein said impedance in said matching circuit affecting a phase of said second harmonic generated from said Bipolar Transistor is matched so that a distortion component generated in said power amplifier is compensated for by said second harmonic inputted in said addition circuit.

12. A power amplifying device with a distortion compensating function, comprising:

a matching circuit in which an input signal is inputted and an impedance is matched;

a first Bipolar Transistor in which a signal from said matching circuit is inputted to a base thereof and a source an emitter thereof is grounded;

a dividing circuit in which a signal from a collector of said first Bipolar Transistor is inputted and said signal is divided into two to output to first and second output terminals;

a band pass filter in which a signal from said first output terminal of said dividing circuit is inputted and only a second harmonic of said signal is passed;

an addition circuit in which a signal outputted from said band pass filter is added to a signal outputted from said second output terminal of said dividing circuit; and

a second Bipolar Transistor in which a signal from said addition circuit is inputted to a base thereof, an emitter thereof is grounded, and an output signal is generated from a collector thereof;

wherein said impedance in said matching circuit affecting a phase of said second harmonic generated from said first Bipolar Transistor is matched so that a distortion component generated in said second Bipolar Transistor is compensated for by said second harmonic inputted in said addition circuit.