Reconfigurable parallelism architecture

• US 20050216700A1
• Filed: 03/26/2004
• Published: 09/29/2005
• Est. Priority Date: 03/26/2004
• Status: Abandoned Application

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Honary, Hooman, Chen, Inching
• Application Number:
  US10/813,790
• Publication Number:
  US 20050216700A1
• Time in Patent Office: Days
• US Class Current: 712/15
• CPC Class Codes: G06F 15/17393 having multistage networks, e.g. broadcasting scattering, gathering, hot spot contention, combining/decombining
• CPC Class Codes: H04W 28/18 Negotiating wireless communication parameters
• CPC Class Codes: H04W 76/10 Connection setup

Abstract

Method and apparatus to perform reconfigurable parallel processing are described.

Claims

1. An apparatus, comprising:

a memory unit to store data;

a plurality of parallel data paths to process said data;

a plurality of control units to control said data paths; and

a switch to connect said control units to said data paths, said switch to receive configuration information to establish a first set of connections between said control units and said data paths to execute a first process, and a second set of connections between said control units and said data paths to execute a second process.

2. The apparatus of claim 1, wherein each control unit controls execution of a single program instruction.

3. The apparatus of claim 2, wherein said first set of connections connects said control units and said data paths in a first configuration to perform single instruction multiple data processing.

4. The apparatus of claim 2, wherein said first set of connections connect at least one of said plurality of control units to multiple data paths, with said one control unit to control said multiple data paths.

5. The apparatus of claim 4, wherein each data path performs a same set of operations using said data.

6. The apparatus of claim 2, wherein said second set of connections connects said control units to said data paths in a second configuration to perform multiple instruction multiple data processing.

7. The apparatus of claim 2, wherein said second set of connections connect multiple control units to multiple data paths, with each control unit to control a single data path.

8. The apparatus of claim 4, wherein each data path performs a different set of operations using said data.

9. The apparatus of claim 1, further comprising a configuration module to configure said switch to establish said connections in accordance with said configuration information.

10. A system, comprising:

an antenna;

a host processing system;

a configuration module to store configuration information; and

a reconfigurable communication architecture module to receive said configuration information, said reconfigurable communication architecture module to configure itself to perform single instruction multiple data processing in a first configuration to execute a first process, and to perform multiple instruction multiple data processing in a second configuration to execute a second process.

11. The system of claim 10, wherein said reconfiguration communication architecture module comprises:

a plurality of processing elements to execute functions for each process;

a plurality of routing elements to connect said processing elements; and

a plurality of communications mediums to connects said processing elements and said routing elements in a mesh topology.

12. The system of claim 10, wherein one of said processing elements comprises:

a memory unit to store data;

a plurality of parallel data paths to process said data;

a plurality of control units to control said data paths; and

a switch to connect said control units to said data paths, said switch to receive said configuration information to establish a first set of connections between said control units and said data paths to execute said first process, and a second set of connections between said control units and said data paths to execute said second process.

13. The system of claim 12, wherein each control unit controls execution of a single program instruction.

14. The system of claim 13, wherein said first set of connections connect at least one of said plurality of control units to multiple data paths, with said one control unit to control said multiple data paths.

15. The system of claim 13, wherein said second set of connections connect multiple control units to multiple data paths, with each control unit to control a single data path.

16. A method, comprising:

receiving configuration information at a switch; and

configuring said switch to establish a first set of connections between a plurality of control units and a plurality of data paths to execute a first process using single instruction multiple data processing; and

configuring said switch to establish a second set of connections between said control units and said data paths to execute a second process using multiple instruction multiple data processing.

17. The method of claim 16, wherein each control unit controls execution of a single program instruction.

18. The method of claim 17, wherein said first set of connections connect at least one of said plurality of control units to multiple data paths, with said one control unit to control said multiple data paths.

19. The method of claim 17, wherein said second set of connections connect multiple control units to multiple data paths, with each control unit to control a single data path.

20. The method of claim 16, further comprising:

receiving a first set of data;

storing said first set of data in a memory unit; and

processing said first set of data with said data paths using said first set of connections.

21. The method of claim 16, further comprising:

receiving a second set of data;

storing said second set of data in a memory unit; and

processing said second set of data with said data paths using said second set of connections.

22. An article comprising:

a storage medium;

said storage medium including stored instructions that, when executed by a processor, result in receiving configuration information at a switch, configuring said switch to establish a first set of connections between a plurality of control units and a plurality of data paths to execute a first process using single instruction multiple data processing, and configuring said switch to establish a second set of connections between said control units and said data paths to execute a second process using multiple instruction multiple data processing.

23. The article of claim 22, wherein the stored instructions, when executed by a processor, further result in said first set of connections connecting at least one of said plurality of control units to multiple data paths, with said one control unit to control said multiple data paths.

24. The article of claim 22, wherein the stored instructions, when executed by a processor, further result in said second set of connections connecting multiple control units to multiple data paths, with each control unit to control a single data path.