Semiconductor device assemblies and packages including multiple semiconductor device components

• US 20050218518A1
• Filed: 05/27/2005
• Published: 10/06/2005
• Est. Priority Date: 06/27/2002
• Status: Active Grant

• Current Assignee: Lim Thiam Chye, Setho Sing Fee, Tay Wuu Yean, Tongbi Jiang
• Original Assignee: Lim Thiam Chye, Setho Sing Fee, Tay Wuu Yean, Tongbi Jiang
• Inventors: Jiang, Tongbi, Chye, Lim Thiam, Yean, Tay Wuu, Fee, Setho Sing
• Granted Patent: US 7,573,136 B2
• Time in Patent Office: Days
• US Class Current: 257/738
• CPC Class Codes: H01L 2224/05568 the whole external layer protruding from the surface
• CPC Class Codes: H01L 2224/05573 Single external layer
• CPC Class Codes: H01L 2224/05624 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/05639 Silver [Ag] as principal constituent
• CPC Class Codes: H01L 2224/05644 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/0615 Mirror array, i.e. array having only a reflection symmetry, i.e. bilateral symmetry
• CPC Class Codes: H01L 2224/16145 the bodies being stacked
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/45015 being circular
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/73257 Bump and wire connectors
• CPC Class Codes: H01L 2224/81 using a bump connector
• CPC Class Codes: H01L 2224/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 2225/0651 Wire or wire-like electrical connections from device to substrate
• CPC Class Codes: H01L 2225/06513 Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
• CPC Class Codes: H01L 2225/06524 Electrical connections formed on device or on substrate, e.g. a deposited or grown layer
• CPC Class Codes: H01L 2225/06527 Special adaptation of electrical connections, e.g. rewiring, engineering changes, pressure contacts, layout
• CPC Class Codes: H01L 2225/06541 Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV]
• CPC Class Codes: H01L 2225/06555 : Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking
• CPC Class Codes: H01L 2225/06586 : Housing with external bump or bump-like connectors
• CPC Class Codes: H01L 2225/1023 : the support being an insulating substrate
• CPC Class Codes: H01L 2225/1035 : the device being entirely enclosed by the support, e.g. high-density interconnect [HDI]
• CPC Class Codes: H01L 2225/1058 : Bump or bump-like electrical connections, e.g. balls, pillars, posts
• CPC Class Codes: H01L 23/3128 : the substrate having spherical bumps for external connection
• CPC Class Codes: H01L 24/05 : of an individual bonding area
• CPC Class Codes: H01L 24/48 : of an individual wire connector
• CPC Class Codes: H01L 24/97 : the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 25/0657 : Stacked arrangements of devices
• CPC Class Codes: H01L 25/105 : the devices being of a type provided for in group H01L27/00
• CPC Class Codes: H01L 2924/00 : Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 : Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/01087 : Francium [Fr]
• CPC Class Codes: H01L 2924/09701 : Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/15151 : the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections
• CPC Class Codes: H01L 2924/15173 : in a single layer of the multilayer substrate
• CPC Class Codes: H01L 2924/15311 : being a ball array, e.g. BGA
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/18161 : of a flip chip
• CPC Class Codes: H01L 2924/18165 : of a wire bonded chip
• CPC Class Codes: H01L 2924/207 : Diameter ranges

Abstract

A multidie semiconductor device assembly or package includes an interposer comprising a substrate with at least one receptacle therethrough. A plurality of semiconductor device components (e.g., semiconductor devices) may be assembled with the interposer. For example, at least one contact pad of a semiconductor device component adjacent to one surface of the interposer may be electrically connected to a corresponding contact pad of another semiconductor device component positioned adjacent to an opposite surface of the interposer. As another example, multiple semiconductor device components may be at least partially superimposed relative to one another and at least partially disposed within a receptacle of the interposer.

Claims

1. A semiconductor device assembly, comprising:

an interposer including a substrate with an opening therethrough;

at least one semiconductor device component positioned adjacent to a first surface of the interposer, at least partially over the opening, a bond pad-bearing surface of the at least one semiconductor device component facing the opening;

at least another semiconductor device component positioned adjacent to a second surface of the interposer, at least partially over the opening, a bond pad-bearing surface at least another semiconductor device component facing the opening, at least one bond pad of the at least another semiconductor device component being in electrical communication with at least one bond pad of the at least one semiconductor device component.

2. The semiconductor device assembly of claim 1, further comprising:

at least one discrete conductive element establishing the electrical communication between the at least one bond pad of the at least one semiconductor device component and the at least one bond pad of the at least another semiconductor device component.

3. The semiconductor device assembly of claim 1, wherein at least another bond pad of the at least one semiconductor device component communicates electrically with a corresponding bond pad on the first surface of the interposer.

4. The semiconductor device assembly of claim 3, further comprising:

at least one discrete conductive element between the at least another bond pad of the at least one semiconductor device component and the corresponding bond pad of the interposer.

5. The semiconductor device assembly of claim 1, wherein the at least one bond pad of the at least one semiconductor device component comprises a portion of a redistribution circuit.

6. The semiconductor device assembly of claim 5, wherein the redistribution circuit further comprises a conductive trace in electrical communication with the at least one bond pad and a redistribution bond pad at an end of the conductive trace opposite from the corresponding bond pad.

7. The semiconductor device assembly of claim 6, wherein the redistribution bond pad is positioned adjacent to an outer periphery of the second semiconductor device.

8. A semiconductor device assembly, comprising:

an interposer with an opening therethrough; and

at least two semiconductor device components in at least partially superimposed arrangement disposed at least partially within the opening.

9. The semiconductor device assembly of claim 8, wherein the at least two semiconductor device components are oriented with backsides thereof facing each other.

10. The semiconductor device assembly of claim 8, further comprising:

at least another semiconductor device component positioned over a surface of the interposer.

11. The semiconductor device assembly of claim 10, wherein at least one bond pad of the at least another semiconductor device component is in electrical communication with at least one bond pad of a semiconductor device component of the at least two semiconductor device components.

12. The semiconductor device assembly of claim 11, wherein the at least one bond pad of the at least another semiconductor device component communicates with internal circuitry of the at least another semiconductor device component.

13. The semiconductor device assembly of claim 11, wherein the at least one bond pad of the at least another semiconductor device component comprises a portion of a redistribution circuit.

14. The semiconductor device assembly of claim 13, wherein the redistribution circuit facilitates electrical communication between the at least one bond pad of the semiconductor device component and a corresponding bond pad of the interposer.

15. The semiconductor device assembly of claim 10, wherein the at least another semiconductor device component is electrically connected to the interposer.

16. The semiconductor device assembly of claim 15, wherein bond pads of the at least another semiconductor device component are aligned with corresponding bond pads of the interposer.