Semiconductor device and manufacturing method thereof

• US 20050218519A1
• Filed: 02/24/2005
• Published: 10/06/2005
• Est. Priority Date: 02/27/2004
• Status: Active Grant

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: Semiconductor Technology Academic Research Center
• Inventors: Nishikawa, Satoshi, Yoshimaru, Masaki, Shimizu, Noriyoshi, Nasu, Hayato, Koike, Junichi, Usui, Takamasa, Wada, Makoto, Shibata, Hideki, Takahashi, Shingo
• Granted Patent: US 7,304,384 B2
• Time in Patent Office: Days
• US Class Current: 257/756
• CPC Class Codes: H01L 21/76831 in via holes or trenches, e.g. non-conductive sidewall liners
• CPC Class Codes: H01L 21/76844 Bottomless liners
• CPC Class Codes: H01L 21/76849 the layer being positioned on top of the main fill metal
• CPC Class Codes: H01L 21/76855 After-treatment introducing at least one additional element into the layer
• CPC Class Codes: H01L 21/76856 by treatment in plasmas or gaseous environments, e.g. nitriding a refractory metal liner
• CPC Class Codes: H01L 21/76867 characterized by methods of formation other than PVD, CVD or deposition from a liquids PVD H01L21/2855; CVD H01L21/28556; deposition from liquids H01L21/288
• CPC Class Codes: H01L 21/76873 for electroplating
• CPC Class Codes: H01L 23/53238 Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A semiconductor device includes an interlevel insulating film disposed on a semiconductor substrate and having an opening formed therein. An interconnection main layer, which contains Cu as a main component, is embedded in the opening. A barrier film is interposed between the interlevel insulating film and the interconnection main layer within the opening. The barrier film contains, as a main component, a compound of a predetermined metal element with a component element of the interlevel insulating film.

Claims

1. A semiconductor device comprising:

an interlevel insulating film disposed on a semiconductor substrate and having an opening formed therein;

an interconnection main layer embedded in the opening and containing Cu as a main component; and

a barrier film interposed between the interlevel insulating film and the interconnection main layer within the opening, the barrier film containing, as a main component, a compound of a predetermined metal element with a component element of the interlevel insulating film.

2. The semiconductor device according to claim 1, wherein the opening is formed to reach a conductive layer disposed below the interlevel insulating film, and the barrier film is not interposed between the conductive layer and the interconnection main layer.

3. The semiconductor device according to claim 1, wherein the opening includes one or both of an interconnection groove and an interconnection hole.

4. The semiconductor device according to claim 1, wherein the barrier film further covers an upper surface of the interconnection main layer.

5. The semiconductor device according to claim 1, wherein the predetermined metal element comprises at least one element selected from the group consisting of Mn, Nb, Zr, Cr, V, Y, Tc, and Re.

6. The semiconductor device according to claim 1, wherein the interlevel insulating film comprises O and at least one element selected from the group consisting of Si, C, and F, and the barrier film contains, as a main component, a material selected from the group consisting of α

_xO_y, α

_xSi_yO_z, α

_xC_yO_z, and α

_xF_yO_z, where a denotes the predetermined metal element.

7. The semiconductor device according to claim 2, wherein the conductive layer is a lower interconnection layer, and the device further comprises a lower insulating film interposed between the lower interconnection layer and the interlevel insulating film, such that the opening passes through the lower insulating film.

8. The semiconductor device according to claim 7, wherein the lower insulating film contains oxygen at a concentration of 33% or less by atomic percentage.

9. The semiconductor device according to claim 8, wherein the lower insulating film has an oxygen concentration set to be lower on a side facing the lower interconnection layer than on a side facing the interlevel insulating film.

10. The semiconductor device according to claim 7, wherein the lower insulating film contains, as a main component, a material selected from the group consisting of SiC, SiCN, and SiN.

11. The semiconductor device according to claim 2, wherein the conductive layer is a lower interconnection layer, and the device further comprises a refractory metal layer interposed between the lower interconnection layer and the interlevel insulating film.

12. The semiconductor device according to claim 11, wherein the refractory metal layer is further interposed between the lower interconnection layer and the interconnection main layer.

13. The semiconductor device according to claim 11, wherein the refractory metal layer contains, as a main component, a material selected from the group consisting of CoW, CoWB, CoWP, and CuSi.

14. The semiconductor device according to claim 1, wherein the interlevel insulating film comprises a porous low dielectric constant film, and the device further comprises a coating film interposed between the interlevel insulating film and the barrier film and having a higher atomic density than the interlevel insulating film.

15. The semiconductor device according to claim 14, wherein the interlevel insulating film and the coating film contain the same material as a main component.

16. The semiconductor device according to claim 1, wherein the barrier film has a thickness of 5 nm or less.

17. A method of manufacturing a semiconductor device, comprising:

forming an opening in an interlevel insulating film disposed on a semiconductor substrate;

forming an auxiliary film containing a predetermined metal element, to cover an inner surface of the opening;

forming a main film to fill the opening after forming the auxiliary film, the main film containing, as a main component, Cu used as a material of an interconnection main layer; and

performing a heat treatment before or after forming the main film, thereby diffusing the predetermined metal element of the auxiliary film onto a surface of the interlevel insulating film facing the auxiliary film, so as to form a barrier film on the interlevel insulating film within the opening, the barrier film containing, as a main component, a compound of the predetermined metal element with a component element of the interlevel insulating film.

18. The method according to claim 17, further comprising forming an upper insulating film to cover an upper surface of the main film after forming the main film, wherein the heat treatment is thereafter performed, thereby diffusing the predetermined metal element of the auxiliary film also to the upper surface of the main film, so as to form a reaction product film on the upper surface, the reaction product film containing, as a main component, a compound of the predetermined metal element with a component element of the upper insulating film.

19. The method according to claim 17, wherein the heat treatment is performed within an atmosphere containing oxygen after forming the main film, thereby diffusing the predetermined metal element of the auxiliary film also to the upper surface of the main film, so as to form a reaction product film on the upper surface, the reaction product film containing, as a main component, an oxide of the predetermined metal element.

20. The method according to claim 17, wherein the predetermined metal element comprises at least one element selected from the group consisting of Mn, Nb, Zr, Cr, V, Y, Tc, and Re.

21. The method according to claim 17, further comprising forming a refractory metal layer and the interlevel insulating film in this order on a lower interconnection layer disposed on the semiconductor substrate, wherein the opening is formed to pass through the refractory metal layer.

22. The method according to claim 17, wherein the interlevel insulating film is a porous low dielectric constant film, and the method further comprises forming a coating film having a higher atomic density than the interlevel insulating film, to cover an inner surface of the opening, before forming the auxiliary film and the main film.

23. A method of manufacturing a semiconductor device, comprising:

forming an opening in an interlevel insulating film disposed on a semiconductor substrate;

forming a main film to fill the opening, the main film containing, as a main component, Cu used as a material of an interconnection main layer;

forming an auxiliary film containing a predetermined metal element on the main film after forming the main film; and

performing a heat treatment after forming the auxiliary film, thereby diffusing the predetermined metal element of the auxiliary film onto a surface of the interlevel insulating film facing the main film, so as to form a barrier film on the interlevel insulating film within the opening, the barrier film containing, as a main component, a compound of the predetermined metal element with a component element of the interlevel insulating film.

24. The method according to claim 23, further comprising forming an upper insulating film to cover the auxiliary film, wherein the heat treatment is thereafter performed, so as to form a reaction product film on an upper surface of the main film, the reaction product film containing, as a main component, a compound of the predetermined metal element with a component element of the upper insulating film.

25. The method according to claim 23, wherein the heat treatment is performed within an atmosphere containing oxygen, so as to form a reaction product film on an upper surface of the main film, the reaction product film containing, as a main component, an oxide of the predetermined metal element.

26. The method according to claim 23, wherein the predetermined metal element comprises at least one element selected from the group consisting of Mn, Nb, Zr, Cr, V, Y, Tc, and Re.

27. The method according to claim 23, further comprising forming a refractory metal layer and the interlevel insulating film in this order on a lower interconnection layer disposed on the semiconductor substrate, wherein the opening is formed to pass through the refractory metal layer.

28. The method according to claim 23, wherein the interlevel insulating film is a porous low dielectric constant film, and the method further comprises forming a coating film having a higher atomic density than the interlevel insulating film, to cover an inner surface of the opening, before forming the auxiliary film and the main film.