Digital signal conditioning solution for a magnetometer circuit

• US 20050218891A1
• Filed: 04/01/2004
• Published: 10/06/2005
• Est. Priority Date: 04/01/2004
• Status: Active Grant

• Current Assignee: Visteon Global Technologies Incorporated (Visteon Corporation)
• Original Assignee: Visteon Global Technologies Incorporated (Visteon Corporation)
• Inventors: Viola, Jeffrey L.
• Granted Patent: US 7,098,658 B2
• Time in Patent Office: Days
• US Class Current: 324/244
• CPC Class Codes: G01L 3/102 involving magnetostrictive means magnetostrictive sensors H10N35/101
• CPC Class Codes: G01L 3/105 involving inductive means G01L3/102, G01L3/104 take precedence
• CPC Class Codes: G01R 33/04 using the flux-gate principle

Abstract

The present invention provides a fluxgate magnetometer including a fluxgate and a digital processor. The digital processor includes an analog to digital converter for digitizing the back EMF from the fluxgate and a signal generator to generate the fluxgate driving signal. Further, a current sourcing circuit is provided to receive the fluxgate driving signal from the signal generator and transmit a current amplified driver signal to the fluxgate capable of driving the fluxgate in and out of saturation. The signal generator is a pulse width modulator used in conjunction with a voltage shaper and driver to create a triangle-shaped driving signal to excite the fluxgate. The digital processor is further configured to reverse the sign of the digital back EMF signal at a frequency corresponding to two times the frequency of the fluxgate driving signal thereby capturing only the second harmonic of the back EMF signal. The digital processor integrates the digital back EMF signal to generate a signal corresponding to the physical input of the fluxgate magnetometer.

Claims

1. A fluxgate magnetometer comprising:

a fluxgate;

a digital processor in communication with the fluxgate, the digital processor including an analog to digital converter configured to digitize a back EMF signal from the fluxgate generating digitized back EMF signal, and a first signal generator configured to generate a fluxgate driving signal.

2. The system according to claim 1, wherein the first signal generator is a pulse width modulator.

3. The system according to claim 1, wherein the analog to digital converter is connected to a first coil output and a second coil output of the fluxgate.

4. The system according to claim 1, wherein the digital processor is configured to reverse the sign of the digitized back EMF signal at a frequency corresponding to two times the frequency of the fluxgate drive signal.

5. The system according to claim 4, wherein the digital processor is configured to integrate the digitized back EMF signal thereby generating a summation signal.

6. The system according to claim 5, wherein the digital processor is configured to integrate the digitized back EMF signal using a Reimann Sum calculation.

7. The system according to claim 5, wherein the digital processor is configured to modulate the fluxgate driving signal generated by the signal generator based on the summation signal.

8. The system according to claim 5, wherein the digital processor includes a digital to analog converter configured to convert the summation signal into an analog output signal.

9. The system according to claim 8, wherein the digital to analog converter is in electrical communication with a signal amplifier configured to generate an amplified analog output signal.

10. The system according to claim 1, further comprising a current sourcing circuit configured to receive the fluxgate driving signal from the first signal generator of the digital processor, and transmit a current amplified driver signal to the fluxgate.

11. The system according to claim 10, wherein a resistor is connected in electrical series between the first signal generator and the current sourcing circuit, and a capacitor is in electrically parallel connection between the resistor and an electrical ground.

12. The system according to claim 11, further comprising a second signal generator in electrical communication with the current sourcing circuit, wherein the current sourcing circuit includes a first, second, third, and fourth transistor, the first, second, third, and fourth transistor in electrical communication with the fluxgate.

13. The system according to claim 12, wherein the first, second, third, and fourth transistors are MOSFET transistors.

14. The system according to claim 13 wherein the second and third transistor is in electrical communication with the first signal generator, and the first and fourth transistors are in electrical communication with the second signal generator.

15. The system according to claim 14, wherein the second and third transistors are N-channel MOSFETs, and wherein the first and fourth transistors are P-channel MOSFETs.

16. A sensor for measuring torque comprising:

a fluxgate including a magnetic shaft mounted such that a torque may be applied causing a rotation of the shaft, and a magnet disposed on the end of the shaft such that a rotation of the shaft creates a back EMF in a coil;

a digital processor in communication with the fluxgate, the digital processor including an analog to digital converter configured to digitize the back EMF signal from the fluxgate generating a digitized back EMF signal, and a first signal generator configured to generate a fluxgate driving signal.

17. The system according to claim 16, wherein the first signal generator is a pulse width modulator.

18. The system according to claim 16, wherein the analog to digital converter is connected to a first coil output and a second coil output of the fluxgate.

19. The system according to claim 16, wherein the digital processor is configured to reverse the sign of the digitized back EMF signal at a frequency corresponding to two times the frequency of the fluxgate drive signal.

20. The system according to claim 19, wherein the digital processor is configured to integrate the digitized back EMF signal thereby generating a summation signal.

21. The system according to claim 20, wherein the digital processor is configured to integrate the digitized back EMF signal using a Reimann Sum calculation.

22. The system according to claim 20, wherein the digital processor is configured to modulate the fluxgate driving signal generated by the signal generator based on the summation signal.

23. The system according to claim 20, wherein the digital processor includes a digital to analog converter configured to convert the summation signal into an analog output signal.

24. The system according to claim 23, wherein the digital to analog converter is in electrical communication with a signal amplifier configured to generate an amplified analog output signal.

25. The system according to claim 16, further comprising a current sourcing circuit configured to receive the fluxgate driving signal from the first signal generator of the digital processor, and transmit a current amplified driver signal to the fluxgate.

26. The system according to claim 25, wherein a resistor is connected in electrical series between the first signal generator and the current sourcing circuit, and a capacitor is in electrically parallel connection between the resistor and an electrical ground.

27. The system according to claim 26, further comprising a second signal generator in electrical communication with the current sourcing circuit, wherein the current sourcing circuit includes a first, second, third, and fourth transistor, the first, second, third, and fourth transistor in electrical communication with the fluxgate.

28. The system according to claim 27, wherein the first, second, third, and fourth transistors are MOSFET transistors.

29. The system according to claim 28, wherein the second and third transistor is in electrical communication with the first signal generator, and the first and fourth transistors are in electrical communication with the second signal generator.

30. The system according to claim 29, wherein the second and third transistors are N-channel MOSFETs, and wherein the first and fourth transistors are P-channel MOSFETs.