Fractional-Bit Systems
First Claim
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1. An N-ary fractional-bit system, comprising:
- a word comprising m N-ary cells, each cell having N possible states and representing b bits-per-cell; and
an N-ary-to-binary encoder, said word being a source of input for said encoder, the output of said encoder comprising i binary bits;
wherein, the maximum i is n=INT[log2(Nm)], b=n/m, m≧
2, b>
2, N, m, i and n are positive integers, b is a positive non-integer.
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Abstract
The present invention abandons the conventional approach of incrementing bits-per-cell b by 1, but allows increments of states-per-cell N by as little as 1 between product generations. Because N is no longer an integral power of 2, b takes a fractional value, resulting in a fractional-bit system. In a fractional-bit system, cells are decoded in unit of word. By adjusting the word-width, the system efficiency can be optimized.
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Citations
20 Claims
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1. An N-ary fractional-bit system, comprising:
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a word comprising m N-ary cells, each cell having N possible states and representing b bits-per-cell; and
an N-ary-to-binary encoder, said word being a source of input for said encoder, the output of said encoder comprising i binary bits;
wherein, the maximum i is n=INT[log2(Nm)], b=n/m, m≧
2, b>
2, N, m, i and n are positive integers, b is a positive non-integer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20)
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Specification