Display device having improved drive circuit and method of driving same

• US 20050219188A1
• Filed: 05/31/2005
• Published: 10/06/2005
• Est. Priority Date: 03/07/2002
• Status: Active Grant

• Current Assignee: Panasonic Liquid Crystal Display Company Limited (Panasonic Holdings Corporation)
• Original Assignee: Hitachi Displays Limited (Japan Display Incorporated)
• Inventors: Kawabe, Kazuyoshi, Hirakata, Junichi
• Granted Patent: US 7,495,646 B2
• Time in Patent Office: Days
• US Class Current: 345/94
• CPC Class Codes: G09G 2310/021 Double addressing, i.e. scanning two or more lines, e.g. lines 2 and 3; 4 and 5, at a time in a first field, followed by scanning two or more lines in another combination, e.g. lines 1 and 2; 3 and 4, in a second field
• CPC Class Codes: G09G 2310/0224 Details of interlacing
• CPC Class Codes: G09G 2310/0232 Special driving of display border areas
• CPC Class Codes: G09G 2320/0261 in the context of movement of objects on the screen or movement of the observer relative to the screen
• CPC Class Codes: G09G 2320/062 Adjustment of illumination source parameters
• CPC Class Codes: G09G 2320/103 Detection of image changes, e.g. determination of an index representative of the image change
• CPC Class Codes: G09G 2340/0407 Resolution change, inclusive of the use of different resolutions for different screen areas
• CPC Class Codes: G09G 2340/0442 Handling or displaying different aspect ratios, or changing the aspect ratio
• CPC Class Codes: G09G 3/20 for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
• CPC Class Codes: G09G 3/342 using several illumination sources separately controlled corresponding to different display panel areas, e.g. along one dimension such as lines
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence
• CPC Class Codes: G09G 5/399 using two or more bit-mapped memories, the operations of which are switched in time, e.g. ping-pong buffers

Abstract

A display device which includes a plurality of adjacent gate lines and drain lines disposed in a display area of the display device, and a plurality of pixels disposed in the display area, each of the plurality of pixels having a switching element coupled to a corresponding one of the plurality of adjacent gate lines and a corresponding one of the plurality of drain lines. During one frame period, the plurality of adjacent gate lines are selected, and thereby video signals are written into the plurality of pixels via the plurality of drain lines, and thereafter during the one frame period, the plurality of adjacent gate lines are selected, and thereby signals corresponding to blanking data are written into the plurality of pixels.

Claims

1. A display device comprising:

a plurality of adjacent gate lines disposed in a display area of said display device;

a plurality of drain lines disposed in said display area; and

a plurality of pixels disposed in said display area, each of said plurality of pixels having a switching element coupled to a corresponding one of said plurality of adjacent gate lines and a corresponding one of said plurality of drain lines;

wherein, during one frame period, said plurality of adjacent gate lines are selected, and thereby video signals are written into said plurality of pixels via said plurality of drain lines, and thereafter during said one frame period, said plurality of adjacent gate lines are selected, and thereby signals corresponding to blanking data are written into said plurality of pixels.

2. A display device according to claim 1, wherein a polarity of said video signals written into said plurality of pixels during said one frame period is same as a polarity of said signals corresponding to blanking data written into said plurality of pixels during said one frame period.

3. A display device comprising:

a first group of plural adjacent gate lines disposed in a display area of said display device;

a second group of plural gate lines disposed closer to a central portion of said display area than said first group of plural adjacent gate lines is;

a plurality of drain lines disposed in said display area; and

a plurality of pixels formed in said display area;

wherein, during one frame period, said first group of plural adjacent gate lines are selected, and thereby signals corresponding to blanking data are written into pixels of said plurality of pixels coupled to said first group of plural adjacent gate lines, and during said one frame period, said second group of plural gate lines are selected, and thereby video signals are written into pixels of said plurality of pixels coupled to said second group of plural gate lines, and thereafter during said one frame period, said second group of plural gate lines are selected again, and thereby blanking signals corresponding to blanking data are written into pixels of said plurality of pixels coupled to said second group of plural gate lines.

4. A display device according to claim 3, wherein said second group of plural gate lines is composed of plural adjacent gate lines.

5. A display device according to claim 3, wherein, during said one frame period, said second group of plural gate lines are selected, and thereby said video signals are written into said pixels of said plurality of pixels coupled to said second group of plural gate lines, after said first group of plural adjacent gate lines are selected during said one frame period.

6. A display device according to claim 3, wherein said first group of plural adjacent gate lines are selected only once during said one frame period, and thereby signals corresponding to blanking data are written into pixels of said plurality of pixels coupled to said first group of plural adjacent gate lines.

7. A display device according to claim 6, wherein said second group of plural gate lines is composed of plural adjacent gate lines.

8. A display device comprising:

a plurality of gate lines;

a plurality of drain lines;

a plurality of pixels, each of said plurality of pixels having a switching element coupled to a corresponding one of said plurality of gate lines and a corresponding one of said plurality of drain lines; and

a plurality of line light sources arranged in parallel with said plurality of gate lines;

wherein each of said plurality of gate lines are selected two times during one frame period, and thereby video signals and signals corresponding to blanking data are written into said plurality of pixels;

wherein said plurality of gate lines are divided into plural groups each comprised of plural gate lines of said plurality of gate lines;

wherein the signals corresponding to the blanking data are written by selecting the plural gate lines forming a corresponding one of the plural groups of the gate lines at a time, and

wherein at least one of said plurality of line light sources associated with the selected plural gate lines are turned off in synchronism with the writing of the signals corresponding to the blanking data.

9. A display device according to claim 8, wherein the turning off of the at least one of the plurality of line light sources is performed for line light sources disposed in and around a central portion of a display area of said display device.

10. A display device according to claim 9, wherein a number of the plural gate lines selected at a time is two.

11. A display device according to claim 9, wherein a number of the plural gate lines selected at a time is four.

12. A display device comprising:

a plurality of gate lines;

a plurality of drain lines; and

a plurality of pixels, each of said plurality of pixels having a switching element coupled to a corresponding one of said plurality of gate lines and a corresponding one of said plurality of drain lines;

wherein each of said plurality of gate lines are selected two times during one frame period, and thereby video signals and signals corresponding to blanking data are written into said plurality of pixels; and

wherein said video signals and said signals corresponding to said blanking data have a same polarity.

13. A display device comprising:

a plurality of gate lines;

a plurality of drain lines; and

a plurality of pixels, each of said plurality of pixels having a switching element coupled to a corresponding one of said plurality of gate lines and a corresponding one of said plurality of drain lines;

wherein said display device is configured to switch between a first operating mode and a second operating mode;

where said first operating mode is such that each of said plurality of gate lines are selected two times during one frame period, and thereby video signals and signals corresponding to blanking data are written into said plurality of pixels, and said second operating mode is such that each of said plurality of gate lines are selected once during one frame period, and thereby video signals are written into said plurality of pixels, but the signals corresponding to the blanking data are not written into said plurality of pixels; and

wherein said first operating mode generates said video signals by using a first group of gray scale voltages, and said second operating mode generates said video signals by using a second group of gray scale voltages.

14. A display device according to claim 13, wherein said first group of gray scale voltages are produced by using a first series of resistor elements, and said second group of gray scale voltages are produced by using a second series of resistor elements.