Semiconductor system

• US 20050219921A1
• Filed: 04/04/2005
• Published: 10/06/2005
• Est. Priority Date: 04/06/2004
• Status: Active Grant

• Current Assignee: Panasonic Semiconductor Solutions Co., Ltd. (Winbond Electronics Corporation)
• Original Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Inventors: Yamauchi, Hiroyuki
• Granted Patent: US 7,187,596 B2
• Time in Patent Office: Days
• US Class Current: 365/200
• CPC Class Codes: G11C 5/145 Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor G11C5/141 takes precedence
• CPC Class Codes: G11C 8/08 Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines

Abstract

A semiconductor system includes a plurality of memory systems (SARM, ROM, etc.) and circuit systems. The semiconductor system further includes an analog power supply circuit which is common to the memory systems. The analog power supply circuit supplies a source potential to word line drivers of the memory systems. The source potential is set to a potential different from a ground potential and a supply voltage of the semiconductor system.

Claims

1. A semiconductor system, comprising:

a plurality of memory systems which have different threshold voltages; and

a source potential supply section which is common to the plurality of memory systems, the source potential supply section supplying a source potential to a source of at least one transistor included in a memory cell of each of the memory systems,

wherein the source potential is set to a potential different from a ground potential and a supply voltage of the semiconductor system.

2. The semiconductor system of claim 1, wherein the transistor to which the source potential is supplied from the source potential supply section is an access transistor.

3. The semiconductor system of claim 1, wherein:

the plurality of memory systems include an SRAM; and

in the SRAM, the transistor to which the source potential is supplied from the source potential supply section is a load transistor.

4. The semiconductor system of claim 1, wherein the source potential is set to a positive potential whose absolute value is equal to or smaller than 20% of the supply voltage of the semiconductor system.

5. The semiconductor system of claim 1, wherein the source potential is set to a potential whose absolute value is equivalent to a difference between a lowest one of threshold voltages of the memory systems and a highest one of threshold voltages of circuit systems included in the semiconductor system.

6. The semiconductor system of claim 1, wherein at least one of the plurality of memory systems includes a source driver for supplying to a memory cell selected for access the ground potential as a source potential in substitution for the source potential supplied from the source potential supply section.

10. The semiconductor system of claim 1 or 7, further comprising a circuit system,

wherein the plurality of memory systems are provided together with the circuit system on the same chip to constitute a system LSI.

11. The semiconductor system of claim 1 or 7, wherein the source potential supply section has a function of controlling the source potential according to at least any one of the operation frequency, supply voltage and temperature of the semiconductor system.

12. The semiconductor system of claim 1 or 7, wherein:

the source potential supply section includes a reference voltage generation section for generating a reference voltage as a reference for the source potential; and

the semiconductor system further comprises a voltage controlled driver for generating the source potential which is to be supplied to each of the memory systems according to the reference voltage.

13. The semiconductor system of claim 12, wherein the reference voltage generation section has a function of controlling the reference voltage according to at least any one of the operation frequency, supply voltage and temperature of the semiconductor system.

14. The semiconductor system of claim 1 or 7, further comprising a substrate potential supply section which is common to the plurality of memory systems, the substrate potential supply section supplying a substrate potential to the memory systems.

7. A semiconductor system, comprising:

a plurality of memory systems which have different threshold voltages; and

a source potential supply section which is common to the plurality of memory systems, the source potential supply section supplying a source potential to a word line driver of each of the memory systems,

wherein the source potential is set to a potential different from a ground potential and a supply voltage of the semiconductor system.

8. The semiconductor system of claim 7, wherein the source potential is set to a negative potential whose absolute value is equal to or smaller than 20% of the supply voltage of the semiconductor system.

9. The semiconductor system of claim 7, wherein the source potential is set to a potential whose absolute value is equivalent to a difference between a lowest one of threshold voltages of the memory systems and a highest one of threshold voltages of circuit systems included in the semiconductor system.