Disk controller methods and apparatus with improved striping, redundancy operations and interfaces

• US 20050223269A1
• Filed: 03/14/2005
• Published: 10/06/2005
• Est. Priority Date: 03/12/2004
• Status: Active Grant

• Current Assignee: NVIDIA Corporation
• Original Assignee: NVIDIA Corporation
• Inventors: Stolowitz, Michael C.
• Granted Patent: US 7,913,148 B2
• Time in Patent Office: Days
• US Class Current: 714/6
• CPC Class Codes: G06F 11/1076 Parity data used in redundant arrays of independent storages, e.g. in RAID systems
• CPC Class Codes: G06F 2211/1054 Parity-fast hardware, i.e. dedicated fast hardware for RAID systems with parity
• CPC Class Codes: G06F 3/0617 in relation to availability
• CPC Class Codes: G06F 3/0656 Data buffering arrangements
• CPC Class Codes: G06F 3/0689 Disk arrays, e.g. RAID, JBOD

Abstract

A RAID disk drive controller (FIG. 33) implements disk storage operations, including striping and redundancy operations with multiple disk drives connected via respective SATA ports (520). Configurable data path switch logic (460) provides dynamic configuration of two or more attached drives into one or more arrays. Data transfers are synchronized locally by leveraging the SATA port transport layer FIFO (530). Synchronous transfers allow on-the-fly redundancy (XOR) operations (FIG. 36) for improved performance and reduced hardware complexity. XOR accumulator hardware (FIG. 42-FIG. 43) reduces buffer requirements for multiple DMA channels otherwise required for synchronization, and various narrow and wide striping modes are supported.

Claims

6. A method for updating a block of data stored in a striped data architecture in a redundant disk drive array with a block of new data, the method comprising the steps of:

identifying a current data stripe that includes the block to be updated;

identifying a first drive of the array that stores current parity data for the current stripe;

identifying a second drive of the array that stores the data block to be updated;

reading the data block and reading a corresponding parity block from the first and second drives, respectively;

computing a first XOR of the retrieved data block and the retrieved parity block to form an intermediate block of data;

storing the computed XOR

in a temporary storage location, wherein said computing step is done “

on the fly”

during said storing step without storing the retrieved data block and the retrieved parity block in memory;

reading the temporary storage location block and reading the new data block;

computing a second XOR of the intermediate block and the new data block;

synchronously storing the second computed XOR

in the parity drive (first drive) and storing the new data block into the second drive.

7. A method according to claim 6 wherein the array comprises drives connected via a serial port.

8. A method according to claim 7 wherein the array comprises drives connected via a SATA port.

9. A method according to claim 8 wherein the array is coupled to a buffer by data path switch logic.

10. A method according to claim 9 wherein the data path switch logic is reconfigurable.

11. A method according to claim 9 wherein the data path switch logic includes boolean XOR hardware for computing an XOR with selected data input from any of the drives.

12. A two-step method for updating a data block and a parity block stored in a redundant disk drive array with updated data, the method comprising the steps of:

in a first step, reading the data block and reading the parity block from the array;

computing an XOR of the data block and the parity block; and

storing the computed XOR in a temporary storage location without storing either the data block or the parity block in memory; and

in a second step, reading the computed XOR from the temporary storage location and reading the updated data block from memory;

computing a second XOR of the first computed XOR and the updated data block;

storing the updated data block in the array; and

storing the second computed XOR in the parity drive of the array to update the parity block.

13. A method according to claim 12 wherein the array comprises drives connected via a serial port.

14. A method according to claim 13 wherein the array comprises drives connected via a SATA port.

15. A method according to claim 14 wherein the array is coupled to a buffer by data path switch logic.

16. A method according to claim 15 wherein the data path switch logic in inserted between the SATA drives and host buffer DMA to synchronize the data movement and enable XOR calculations on the fly.

17. An improved RAID disk array controller comprising:

a plurality of serial disk drive interfaces for attaching physical disk drives to form a disk drive array;

each of the serial interfaces including a buffer memory for storing write data to be stored on the attached disk drive in a disk write operation;

each of the serial interfaces providing a status flag output to indicate when the buffer memory is FULL;

switch logic circuitry coupled to all of the serial interfaces for receiving write data from at least one DMA channel and providing the write data to the buffer memories during a write operation;

a logic circuit for detecting when all of the buffer memories are not full; and

a control circuit responsive to the logic circuit for synchronously writing the write data from the DMA channel(s) to all of the buffer memories via the switch logic circuitry, thereby forming synchronous write data; and

the switch logic circuitry includes a boolean XOR circuit for forming redundant data “

on the fly”

from the synchronous write data for storing in the array.

18. An improved RAID disk array controller according to claim 17 wherein the serial disk drive interface comprises a SATA specification-compliant interface.

19. An improved RAID disk array controller according to claim 18 wherein the controller is implemented on a daughter board.

20. An improved RAID disk array controller according to claim 18 wherein the controller is implemented on a computer motherboard.

21. An improved RAID disk array controller according to claim 18 wherein the switch logic circuitry is configurable for implementing a desired association between the DMA channels and at least one of the SATA disk drive interfaces.

22. An improved RAID disk array controller according to claim 21 wherein the switch logic circuitry is configured by mapping data.

23. An improved RAID disk array controller according to claim 21 wherein the mapping data is software reconfigurable for dynamically reconfiguring the switch logic circuitry.

24. An improved RAID disk array controller according to claim 17 and wherein the switch logic circuitry steers the redundant data to one or more of the serial interfaces for storage concurrently with the write data in a single disk write operation.

25. An improved RAID disk array controller according to claim 17 wherein each serial port buffer memory comprises a FIFO memory.

26. An improved RAID disk array controller according to claim 17 wherein the switch logic circuitry implements 32-bit data paths in accordance with a current configuration.

27. An improved RAID disk array controller according to claim 26 wherein the switch logic circuitry is configured by mapping data.

28. An improved RAID disk array controller according to claim 27 wherein the mapping data is software reconfigurable for dynamically reconfiguring the switch logic circuitry.

29. An improved disk array controller according to claim 27, implemented on a Host Bus Adapter.

30. An improved RAID disk array controller according to claim 17 wherein the switch logic circuitry includes a disk write accumulator circuit.

31. An improved RAID disk array controller comprising:

[READ]

a plurality of serial disk drive interfaces for attaching physical disk drives to form a disk drive array;

each of the serial interfaces including a buffer memory for storing read data fetched from the attached disk drive in a disk read operation;

each of the serial interfaces providing a status flag output to indicate whether the buffer memory is presently empty or not;

switch logic circuitry coupled to all of the serial interfaces to implement data paths for receiving read data from at least one of the serial interfaces and providing the received read data to at least one DMA channel during a write operation;

a logic circuit for detecting when all of the buffer memories are not empty;

a control circuit responsive to the logic circuit for synchronously transferring the read data from all of the buffer memories to the DMA channel(s) via the switch logic circuitry, thereby forming synchronous read data; and

the switch logic circuitry includes a boolean XOR circuit for reconstructing missing data “

on the fly”

from the synchronous read data as it is transferred from the buffer memories to the DMA channel(s).

1. A method of synchronously reading data from a redundant RAID disk drive array having any number of data drives with a single redundant drive, where the stored data is striped over the drives with a stripe width of one or more sectors, and the read request size is an integer number of sectors from one up to the capacity of the array, the method comprising the steps of:

determining whether any drive of the array has failed;

identifying a first drive of the array that contains an initial sector of the read request data;

reading data from the first drive, from the said initial sector of the read request up to the end of the block, or to the end of the read request, whichever comes first;

if the initial sector is stored on a failed drive, reading the corresponding range of sectors from the remaining drives, computing a boolean XOR function of the data read from the remaining drives, and transferring the result “

on-the-fly”

.

2. A method of synchronously reading data from a redundant RAID disk drive array according to claim 1 and further comprising:

if the read request extends beyond a single data block, reading data from successive blocks across the stripe, and reading data from successive stripes across the drives, until the read request is completed, wherein all of the read accesses are carried out concurrently on each of the drives.

3. A method according to claim 2 and further comprising:

if and when a data block is required from a failed drive, reading the corresponding range of sectors from the remaining drives, computing a boolean XOR function of the data read from the remaining drives, and transferring the result “

on-the-fly”

.

4. A method according to claim 2 and further comprising:

identifying a second drive on which a data block is stored that includes a final sector of the read request data;

reading data from the identified second drive;

transferring the second drive data from the start of the block, or from the initial sector if it is in the same block, up to the final sector; and

if the final sector block of data resided on a drive which has failed, reading the corresponding range of sectors from the remaining drives, computing a boolean XOR function of the data read from the remaining drives, and transferring the result as the final sector block of data.

5. A method according to claim 2 wherein the drives of the RAID array are SATA drives, each attached with a SATA port, and the synchronous data read operations include synchronously transferring data from the controller side of each SATA port.

32. An improved RAID disk array controller according to claim 31 wherein the serial disk drive interface comprises a SATA specification-compliant interface.

33. An improved RAID disk array controller according to claim 32 wherein the controller is implemented on a daughter board.

34. An improved RAID disk array controller according to claim 32 wherein the controller is implemented on a computer motherboard.

35. An improved RAID disk array controller according to claim 32 wherein the switch logic circuitry is configurable for implementing a desired association between the DMA channels and at least one of the SATA disk drive interfaces.

36. An improved RAID disk array controller according to claim 34 wherein the mapping data is software reconfigurable for dynamically reconfiguring the switch logic circuitry.

37. An improved RAID disk array controller according to claim 31 and wherein the switch logic circuitry steers the redundant data to one or more of the DMA channels concurrently with the read data in a single disk read operation.

38. An improved RAID disk array controller according to claim 31 wherein each serial port buffer memory comprises a FIFO memory.

39. An improved RAID disk array controller according to claim 31 wherein the switch logic circuitry implements 32-bit data paths in accordance with a current configuration.

40. An improved RAID disk array controller according to claim 39 wherein the switch logic circuitry is configured by mapping data.

41. An improved RAID disk array controller according to claim 40 wherein the mapping data is software reconfigurable for dynamically reconfiguring the switch logic circuitry.

42. An improved disk array controller according to claim 31, implemented on a Host Bus Adapter.

43. An improved RAID disk array controller according to claim 31 wherein the switch logic circuitry includes a disk read accumulator circuit.

35-1. An improved RAID disk array controller according to claim 34 wherein the switch logic circuitry is configured by mapping data.