Stacked columnar 1T-nMTJ MRAM structure and its method of formation and operation
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Abstract
This invention relates to an MRAM array architecture which incorporates certain advantages from both cross-point and 1T-1MTJ architectures during reading operations. The fast read-time and higher signal to noise ratio of the 1T-1MTJ architecture and the higher packing density of the cross-point architecture are both exploited by using a single access transistor to control the reading of multiple stacked columns of MRAM cells each column being provided in a respective stacked memory layer.
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Citations
65 Claims
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1-61. -61. (canceled)
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62. A method of reading a resistive memory device comprising a plurality of slices of resistive memory cells, each slice comprising an array of memory cells arranged in rows and columns and an access transistor, said method comprising:
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determining the X axis direction of a column decode signal associated with a selected memory cell;
determining the Y-Z plane direction of a row decode signal associated with said selected memory cell;
reading a resistance level of said selected memory cell; and
determining a logic state of said selected memory cell from said resistance level. - View Dependent Claims (63, 64, 65)
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Specification