Receiver circuit comprising equalizer
First Claim
1. A receiver circuit for receiving a received signal that propagates through a transmission medium, comprising:
- an equalizer that equalizes the received signal;
a data detection circuit that detects an analog output signal of the equalizer at a data sample timing and outputs a digital signal;
an intersymbol interference detection circuit that detects an intersymbol interference level from the analog output signal of the equalizer at the data sample timing and from the digital signal;
an equalizer characteristic control unit that controls the characteristic of the equalizer to minimize the intersymbol interference level detected by the intersymbol interference detection circuit; and
a data sample timing control unit in which the data sample timing is controlled to a minimal sample timing at which the difference between the amplitude of the analog output waveform of the equalizer with respect to an impulse and the amplitude of an ideal impulse response waveform is minimal.
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Accused Products
Abstract
A receiver circuit has an equalizer that equalizes a received signal propagating through a transmission medium; a data detection circuit that detects an analog output signal of the equalizer at a data sample timing and outputs a digital signal; an intersymbol interference detection circuit that detects an intersymbol interference level from the analog output signal of the equalizer at the data sample timing and from the digital signal of the data detection circuit; and an equalization characteristic control unit that controls the characteristic of the equalizer to minimize the detected intersymbol interference level. The receiver circuit further has a data sample timing control unit in which the data sample timing is controlled to a sample timing at which the difference between the amplitude of the analog output waveform of the equalizer with respect to an impulse and the amplitude of an ideal impulse response waveform is minimal.
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Citations
13 Claims
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1. A receiver circuit for receiving a received signal that propagates through a transmission medium, comprising:
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an equalizer that equalizes the received signal;
a data detection circuit that detects an analog output signal of the equalizer at a data sample timing and outputs a digital signal;
an intersymbol interference detection circuit that detects an intersymbol interference level from the analog output signal of the equalizer at the data sample timing and from the digital signal;
an equalizer characteristic control unit that controls the characteristic of the equalizer to minimize the intersymbol interference level detected by the intersymbol interference detection circuit; and
a data sample timing control unit in which the data sample timing is controlled to a minimal sample timing at which the difference between the amplitude of the analog output waveform of the equalizer with respect to an impulse and the amplitude of an ideal impulse response waveform is minimal. - View Dependent Claims (2, 3, 4)
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5. A receiver circuit for receiving a received signal that propagates through a transmission medium, comprising:
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an equalizer that equalizes the received signal;
a data detection circuit that detects, at a data sample timing, an analog output signal of the equalizer and outputs a digital signal; and
an equalization characteristic control unit that detects a phase fluctuation amount at the data boundary of the analog output signal of the equalizer and controls the characteristic of the equalizer to reduce the phase fluctuation amount at the data boundary. - View Dependent Claims (6, 7, 8, 9, 10)
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11. A receiver circuit for receiving a received signal that propagates through a transmission medium, comprising:
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an equalizer that equalizes the received signal;
a data detection circuit that detects an analog output signal of the equalizer at a data sample timing and outputs a digital signal; and
an equalization characteristic control unit that detects the amplitude fluctuation amount at the data boundary of the analog output signal of the equalizer and controls the characteristic of the equalizer to reduce the amplitude fluctuation amount at the data boundary. - View Dependent Claims (12, 13)
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Specification