Process for manufacturing mems

• US 20050227428A1
• Filed: 09/06/2002
• Published: 10/13/2005
• Est. Priority Date: 03/20/2002
• Status: Abandoned Application

• Current Assignee: EPFL - Ecole Polytechnique Federale de Lausanne
• Original Assignee: EPFL - Ecole Polytechnique Federale de Lausanne
• Inventors: Vincent, Pott, Philippe, Fluckiger, Cyrille, Hibert, Mihai, Ionescu Adrian, Raphael, Fritschi
• Application Number:
  US10/507,920
• Publication Number:
  US 20050227428A1
• Time in Patent Office: Days
• US Class Current: 438/222
• CPC Class Codes: B81B 2201/0235 Accelerometers
• CPC Class Codes: B81B 2201/0264 Pressure sensors
• CPC Class Codes: B81B 3/0021 Transducers for transforming electrical into mechanical energy or vice versa dynamo-electric machines H02K99/00; electrostatic machines H02N1/00; piezoelectric devices H10N30/00
• CPC Class Codes: B81C 2201/0109 Sacrificial layers not provided for in B81C2201/0107 - B81C2201/0108
• CPC Class Codes: B81C 2201/0132 Dry etching, i.e. plasma etching, barrel etching, reactive ion etching [RIE], sputter etching or ion milling
• CPC Class Codes: H01G 5/16 using variation of distance between electrodes
• CPC Class Codes: H01H 59/0009 making use of micromechanics

Abstract

The invention concerns a process for manufacturing a Micro-Electro-Mechanical-System (MEMS) comprising the use of a sacrificial layer, the process being characterized by the fact that the sacrificial layer is made of silicon. The invention also concerns MEMS devices such as SG-MOSEFT, MEMS switches or MEMS tunable capacitors which may be obtained according to the previous cited process.

Claims

1. Process for manufacturing a Micro-Electro-Mechanical-System (MEMS) comprising the use of a sacrificial layer characterized by the fact that the sacrificial layer is made of silicon.

2. Process according to the claim 1 wherein the silicon sacrificial layer is removed by plasma etching with fluorine-based chemistry.

3. Process according to claim 1 wherein the silicon sacrificial layer is removed by xenon difluoride (XeF2) or bromine trifluoride (BrF3) etching.

4. Process according to claim 1 wherein the silicon is in polycrystalline form.

5. Process according to claim 1 wherein the silicon is in amorphous form.

6. Process according to claim 1 characterized by the fact that it is used in surface micromachining.

7. Process according to claim 1 characterized by the fact that it is used for the manufacture of a MEMS containing a suspended metal layer.

8. MEMS device architecture obtained according to the process as defined in claim 1.

9. MEMS device according to claim 8 to be fabricated on silicon, silicon-on-insulator substrates and on silicon with the underneath substrate etched.

10. MEMS device according to claim 8 characterized by the fact that it comprises a suspended metal gate.

11. MEMS device according to claim 10 characterized by the fact that it is a suspended gate MOSFET.

12. MEMS device according to claim 10 wherein said metal is aluminum, AlSi, AlSiCu, copper, gold, tungsten, platinum, titanium or a combination of these metals.

13. MEMS device architecture obtained according to the process as defined in claim 1 and using two metal levels, one fixed and one movable, called membrane, both capped with one insulator, with variable air-gaps and an underlying insulator deposited on a semiconductor substrate.

14. MEMS device according to claim 13 characterized by the fact that it comprises a high-k dielectric made of TiO2.

15. Use of the device of claim 10 as radiofrequency capacitive switch.

16. Use of the device of claim 10 as current switch.

17. Use of the device of claim 10 as radiofrequency tuneable capacitor.

18. Use of the device of claim 10 as magnetic field sensor.

19. Use of the device of claim 10 as accelerometer.

20. Use of the device of claim 10 as pressure sensor.