Processor system and data processing method

• US 20050228966A1
• Filed: 03/16/2004
• Published: 10/13/2005
• Est. Priority Date: 03/16/2004
• Status: Abandoned Application

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation), Toshiba Tec Corporation (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation), Toshiba Tec Corporation (Toshiba Corporation)
• Inventors: Nakamura, Akihisa
• Application Number:
  US10/800,631
• Publication Number:
  US 20050228966A1
• Time in Patent Office: Days
• US Class Current: 712/1
• CPC Class Codes: G06F 15/8007 single instruction multiple data [SIMD] multiprocessors
• CPC Class Codes: G06F 2209/509 Offload

Abstract

A processor system having a fixed processing unit which has a predetermined information processing function, a variable processing unit which has a variable information processing function, and a control unit which controls so as to cause the fixed processing unit to process a provided task, or so as to cause the variable processing unit to process the task after newly setting an information processing function of the variable processing unit.

Claims

1. A processor system comprising:

a fixed processing unit having a predetermined information processing function;

a variable processing unit having a variable information processing function; and

a control unit which controls so as to cause the fixed processing unit to process a provided task, or so as to cause the variable processing unit to process the task after newly setting an information processing function of the variable processing unit.

2. The processor system according to claim 1, wherein the control unit analyzes the provided task, and controls so as to cause the variable processing unit to process the task after newly setting an information processing function of the variable processing unit in accordance with a result of the analysis.

3. The processor system according to claim 1, wherein the variable processing unit has at least one of an ALU, a MAC, a LUT, and a FIFO, and realizes a new information processing function in accordance with connection information provided from the control unit.

4. The processor system according to claim 1, wherein the fixed processing unit and the variable processing unit are provided as a plurality of sets in accordance with a plurality of image signals, and respectively process said plurality of image signals in parallel.

5. The processor system according to claim 1, further comprising:

a plurality of co-processors having the fixed processing unit, the variable processing unit and the control unit;

a main processor which preferentially processes the task; and

an arbitrating unit which analyzes the task, and allocates the task to said plurality of co-processors in accordance with a result of the analysis.

6. The processor system according to claim 5, wherein the arbitrating unit analyzes the task, and in accordance with a result of the analysis, determines whether the task is allocated to only the main processor or the task is allocated to the main processor and said plurality of co-processors.

7. The processor system according to claim 5, wherein the arbitrating unit calculates a processing time in a case of analyzing and processing the task by only the main processor, and on the basis of the calculated time, determines whether or not the task is processed by only the main processor.

8. The processor system according to claim 1, wherein the variable processing unit has a function of carrying out filtering processing on image information to be provided.

9. The processor system according to claim 1, wherein the variable processing unit has a function of carrying out identification processing on image information to be provided.

10. The processor system according to claim 1, wherein the variable processing unit has a function of carrying out color conversion processing on image information to be provided.

11. A processing method of a processor system, comprising:

determining on causing at least one of a fixed processing unit and a variable processing unit to process with respect to a processor system which has the fixed processing unit having a predetermined information processing function, and the variable processing unit having a variable information processing function; and

controlling so as to cause the fixed processing unit to process a provided task, or so as to process the task after newly setting an information processing function of the variable processing unit.