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System and method for dynamically varying a clock signal

  • US 20050231259A1
  • Filed: 06/17/2005
  • Published: 10/20/2005
  • Est. Priority Date: 11/07/2003
  • Status: Active Grant
First Claim
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1. A circuit comprising:

  • at least one delay element that is operable to receive a clock signal and generate a delayed clock signal having an amount of delay that varies based on an observed value of an operating voltage of said circuit.

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