Apparatus, methods and articles of manufacture for output impedance matching using multi-band signal processing

• US 20050233764A1
• Filed: 04/16/2004
• Published: 10/20/2005
• Est. Priority Date: 04/16/2004
• Status: Active Grant

• Current Assignee: Eagle Technology, LLC (L3Harris Technologies, Inc.)
• Original Assignee: M/A-Com Eurotec BV (TE Connectivity Limited)
• Inventors: Grebennikov, Andrei, Heaney, Eugene, Solski, Piotr
• Granted Patent: US 7,440,729 B2
• Time in Patent Office: Days
• US Class Current: 455/552.100
• CPC Class Codes: H03F 1/565 using inductive elements
• CPC Class Codes: H03F 2200/111 the amplifier being a dual or triple band amplifier, e.g. 900 and 1800 MHz, e.g. switched or not switched, simultaneously or not
• CPC Class Codes: H03F 3/24 of transmitter output stages
• CPC Class Codes: H03H 7/383 comprising distributed impedance elements together with lumped impedance elements
• CPC Class Codes: H03H 7/40 Automatic matching of load impedance to source impedance
• CPC Class Codes: H03H 7/461 particularly adapted for use in common antenna systems
• CPC Class Codes: H04B 1/0458 Arrangements for matching and coupling between power amplifier and antenna or between amplifying stages matching circuits in general H03H

Abstract

Apparatus, methods and articles of manufacture for output impedance matching in multi-band power amplification are provided, wherein an output matching configuration comprising one or more output matching sections, a multi-band diplexer and a switch are connected to an active device.

Claims

1. An apparatus for output impedance matching for a multi-band signal processor comprising:

a multi-band diplexer adapted for receiving input signals having a defined frequency band and generating at least first and second output signals, wherein the first output signals are of a frequency band that is higher than a frequency band of the second output signals; and

at least one switch through which the first output signals from the multi-band diplexer pass, the switch having “

on” and

“

off”

states, the switch being in an “

on”

state when the input signals are of a first frequency band, for suppressing undesired harmonics, and the switch being in an “

off”

state when the input signals are of a second frequency band.

2. An apparatus according to claim 1, further comprising at least one impedance matching section connected with the multi-band diplexer through which at least one of the first output signals and the second output signals are passed.

3. An apparatus according to claim 1, further comprising a first impedance matching section connected with the multi-band diplexer through which the second output signals pass.

4. An apparatus according to claim 3, further comprising a second impedance matching section connected with the switch through which the first output signals pass.

5. An apparatus according to claim 1, wherein the multi-band signal processor comprises an active device for transmitting the input signals that are received by the multi-band diplexer, the apparatus further comprising an impedance matching section connected between the active device and the multi-band diplexer through which the input signals pass.

6. An apparatus according to claim 1, wherein the multi-band signal processor comprises an active device transmitting the input signals that are received by the multi-band diplexer, and a load receiving the first and second output signals generated by the multi-band diplexer, the apparatus further comprising:

an impedance matching section connected between the active device and the multi-band diplexer through which the input signals pass;

a first impedance matching section connected between the multi-band diplexer and the load through which the second output signals pass; and

a second impedance matching section connected between the switch and the load through which the first output signals pass.

7. An apparatus according to claim 1, wherein the switch comprises a PIN-diode.

8. An apparatus according to claim 1, wherein the input signals comprise the second frequency band being of a higher frequency band than the first frequency band.

9. An apparatus according to claim 1, wherein the multi-band signal processor comprises an active device transmitting the input signals that are received by the multi-band diplexer, the active device being selected from the group consisting of a power amplifier and an attenuator.

10. A method for output matching in a multi-band signal processor comprising:

receiving input signals having a defined frequency band and generating at least first and second output signals to a load, with the first output signals being of a frequency band that is higher than a frequency band of the second output signals; and

regulating the first output signals according to the defined frequency band of the input signals, with undesired harmonics being suppressed from the first output signals when the input signals are of a first frequency band.

11. A method according to claim 10, wherein the first output signals are regulated by at least one switch having “

on” and

“

off”

states, the method further comprising operating the switch in an “

on”

state when the input signals are of the first frequency band, for suppressing undesired harmonics, and operating the switch in an “

off”

state when the input signals are of a second frequency band.

12. A method according to claim 10, further comprising matching impedances of the first and second output signals separately.

13. A method according to claim 12, wherein the receiving and generating step comprises a multi-band diplexer, and the step of matching impedances further comprises:

providing a first impedance matching section between the multi-band diplexer and the load through which the second output signals pass; and

providing a second impedance matching section between the multi-band diplexer and the load through which the first output signals pass.

14. A method according to claim 10, wherein the multi-band signal processor comprises an active device transmitting the input signals, and wherein the receiving and generating step comprises a multi-band diplexer, the method further comprising providing an impedance matching section between the active device and the multi-band diplexer through which the input signals pass.

15. An amplifier output impedance matching configuration comprising:

a multi-band diplexer receiving input signals having a defined frequency band from a power amplifier and generating at least first and second output signals to a load, wherein the first output signals are of a frequency band that is higher than a frequency band of the second output signals;

at least one switch connected between the multi-band diplexer and the load for receiving the first output signals from the multi-band diplexer, the switch having “

on” and

“

off”

states, the switch being in an “

on”

state when the input signals are of a first frequency band, for suppressing undesired harmonics, and the switch being in an “

off”

state when the input signals are of a second frequency band; and

one or more impedance matching sections connected between at least one of;

the multi-band diplexer and the load through which at least one of the first outputs signals and the second output signals are passed; and

the power amplifier and the multi-band diplexer through which the input signals pass.

16. An amplifier output impedance matching configuration according to claim 15 further comprising a first impedance matching section connected between the multi-band diplexer and the load through which the second output signals pass and a second impedance matching section connected between the switch and the load through which the first output signals pass.

17. An amplifier output impedance matching configuration according to claim 15, further comprising:

an impedance matching section connected between the power amplifier and the multi-band diplexer through which the input signals pass;

a first impedance matching section connected between the multi-band diplexer and the load through which the second output signals pass; and

a second impedance matching section connected between the switch and the load through which the first output signals pass.

18. An amplifier output impedance matching configuration according to claim 15, wherein the switch comprises a PIN-diode.

19. An amplifier output impedance matching configuration according to claim 15, wherein the input signals comprise the second frequency band being of a higher frequency band than the first frequency band.