Negative hole structure having a protruded portion, method for forming the same, and electron emission device including the same

• US 20050236962A1
• Filed: 03/31/2005
• Published: 10/27/2005
• Est. Priority Date: 03/31/2004
• Status: Active Grant

• Current Assignee: Samsung SDI Company Limited
• Original Assignee: Samsung SDI Company Limited
• Inventors: Lee, Sang Jin
• Granted Patent: US 7,567,027 B2
• Time in Patent Office: Days
• US Class Current: 313/495
• CPC Class Codes: H01J 29/481 Electron guns using field-emission, photo-emission, or secondary-emission electron source
• CPC Class Codes: H01J 3/021 Electron guns using a field emission, photo emission, or secondary emission electron source
• CPC Class Codes: H01J 9/02 Manufacture of electrodes or electrode systems

Abstract

A negative hole is formed by etching a dielectric layer that includes at least a lower dielectric sublayer and an upper dielectric sublayer. The lower dielectric sublayer and the upper dielectric sublayer have substantially the same permittivity, and the lower dielectric sublayer may have a higher etching rate lower than the upper dielectric sublayer. The negative hole formed in the upper and lower dielectric sublayers has an etched profile with a protruded portion protruding from at least the boundary between the lower dielectric sublayer and the upper dielectric sublayer. With various embodiments of the disclosed invention, resistance between the cathode and the gate may be secured to prevent arc generation and signal distortion.

Claims

1. A dielectric layer comprising:

a lower dielectric sublayer;

an upper dielectric sublayer having substantially the same permittivity as the lower dielectric sublayer; and

a negative hole formed in the upper and lower dielectric sublayers, the negative hole having an etched profile with a protruded portion protruding from at least a boundary between the lower dielectric sublayer and the upper dielectric sublayer.

2. The dielectric layer according to claim 1, wherein the lower dielectric sublayer has a higher etching rate than the upper dielectric sublayer.

3. The dielectric layer according to claim 2, wherein the upper dielectric sublayer comprises a first quantity of titanium dioxide (TiO₂), and the lower dielectric sublayer comprises a second quantity of titanium dioxide (TiO₂) which is different from the first quantity.

4. The dielectric layer according to claim 3, wherein the upper dielectric sublayer and lower dielectric sublayer further comprise the same main material.

5. The dielectric layer according to claim 4, wherein the same main material comprises a silicon oxide.

6. The dielectric layer according to claim 4, wherein the same main material comprises lead oxide.

7. The dielectric layer according to claim 1, wherein a peak of the protruded portion is positioned higher than a half thickness of the dielectric layer.

8. A method of forming a negative hole by etching a dielectric layer comprising:

forming a lower dielectric sublayer;

forming an upper dielectric sublayer having substantially the same permittivity as the lower dielectric sublayer; and

etching the upper dielectric sublayer and the lower dielectric sublayer in sequence to form a negative hole, the negative hole having an etched profile with a protruded portion protruding from at least a boundary between the lower dielectric sublayer and the upper dielectric sublayer.

9. The method of claim 8, wherein the lower dielectric sublayer has a higher etching rate than the upper dielectric sublayer.

10. The method according to claim 8, further comprising determining a peak position of the protruded portion by adjusting the relative thickness between the upper dielectric sublayer and the lower dielectric sublayer.

11. The method according to claim 10, wherein the lower dielectric sublayer is formed to be thicker than the upper dielectric sublayer, and the peak of the protruded portion is higher than half the thickness of the dielectric layer.

12. The method according to claim 9, wherein the upper and lower dielectric sublayers are formed from the same material combined with an additive, the method further comprising adjusting the etching rates of the upper dielectric sublayer and the lower dielectric sublayer by adding the additive in different quantities to the upper and lower dielectric sublayers, respectively.

13. The method according to claim 12, wherein the additive is titanium dioxide and the same material is a silicon oxide.

14. The method according to claim 12, wherein the additive is titanium dioxide and the same material is plumbum oxide.

15. The method according to claim 8, wherein the upper and lower dielectric sublayers are etched by an etching solution using a compound of water:

fluoric acid;

nitric acid having a weight percentage in the range of 10˜

40;

1;

1.

16. An electron emission device comprising:

a first electrode formed on a plate;

a dielectric layer formed on the first electrode and having a negative hole through which at least a portion of the first electrode is exposed, the dielectric layer comprising at least a lower dielectric sublayer and an upper dielectric sublayer having substantially the same permittivity as the lower dielectric sublayer;

a negative hole formed in the upper and lower dielectric sublayers and having an etched profile with a protruded portion protruding from at least a boundary between the lower dielectric sublayer and the upper dielectric sublayer;

an electron emission source formed on a predetermined region of the first electrode and having at least one portion exposed through the negative hole; and

a second electrode formed on the dielectric layer.

17. The electron emission device according to claim 16, wherein the lower dielectric sublayer has a higher etching rate than the upper dielectric sublayer.

18. The electron emission device according to claim 17, wherein the lower dielectric sublayer comprises a first quantity of titanium dioxide and the upper dielectric sublayer comprises a second quantity of titanium dioxide which is different from the first quantity.

19. The electron emission device according to claim 16, wherein a peak of the protruded portion is positioned higher than half the thickness of the dielectric layer.

20. The electron emission device according to claim 19, wherein the first electrode comprises ITO, and the electron emission source comprises a CNT emitter.