Semiconductor device with a protected active die region and method therefor

• US 20050242425A1
• Filed: 04/30/2004
• Published: 11/03/2005
• Est. Priority Date: 04/30/2004
• Status: Abandoned Application

• Current Assignee: Freescale Semiconductor, Inc. (NXP Semiconductors NV)
• Original Assignee: Freescale Semiconductor, Inc. (NXP Semiconductors NV)
• Inventors: Fay, Owen R., Leal, George R., Wenzel, Robert J.
• Application Number:
  US10/837,266
• Publication Number:
  US 20050242425A1
• Time in Patent Office: Days
• US Class Current: 257/690
• CPC Class Codes: H01L 21/566 Release layers for moulds, e.g. release layers, layers against residue during moulding
• CPC Class Codes: H01L 2224/81801 Soldering or alloying
• CPC Class Codes: H01L 23/3121 a substrate forming part of the encapsulation
• CPC Class Codes: H01L 24/81 using a bump connector
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/01013 Aluminum [Al]
• CPC Class Codes: H01L 2924/01029 Copper [Cu]
• CPC Class Codes: H01L 2924/01033 Arsenic [As]
• CPC Class Codes: H01L 2924/01047 Silver [Ag]
• CPC Class Codes: H01L 2924/01082 Lead [Pb]
• CPC Class Codes: H01L 2924/181 Encapsulation
• CPC Class Codes: H01L 2924/19042 being an inductor
• CPC Class Codes: H01L 2924/3025 Electromagnetic shielding

Abstract

A semiconductor device includes a semiconductor die having a plurality of contact pad sites, a plurality of contact pads, an encapsulant barrier, and an encapsulant. A plurality of contact pads is in electrical contact with a predetermined corresponding different one of the contact pad sites. An encapsulant barrier is positioned at an outer perimeter of the semiconductor die. The encapsulant barrier has a height that is as high as or greater than a highest of the plurality of contact pads. The encapsulant barrier is in physical contact with a same surface of the semiconductor die as the contact pad sites. An encapsulant surrounds the semiconductor die and one side of the encapsulant barrier. The encapsulant is blocked from making physical contact with any of the plurality of contact pads by the encapsulant barrier when the device is encapsulated while being supported by a temporary base support layer.

Claims

1. A semiconductor device, comprising:

a semiconductor die having a first surface and a second surface that are opposite each other, the first surface having a plurality of contact pad sites;

a plurality of contact pads, each of the plurality of contact pads having a substantially same predetermined height and having a first end and a second end, the first end of each of the plurality of contact pads being in electrical contact with a predetermined corresponding different one of the plurality of contact pad sites;

an encapsulant barrier positioned at a periphery of the plurality of contact pads, the encapsulant barrier having substantially the same predetermined height of the plurality of contact pads, the encapsulant barrier having a first surface and an opposing second surface, the first surface being in physical contact with the first surface of the semiconductor die;

a first layer having a first surface and a second surface, the first surface of the first layer being in direct physical contact with the second surface of the encapsulant barrier and the second end of each of the plurality of contact pads;

a second layer in direct physical contact with the first layer; and

an encapsulant surrounding the second surface of the semiconductor die and being blocked from making physical contact with any of the plurality of contact pads by the encapsulant barrier, wherein the first layer and the second layer are releasable from the semiconductor die after curing of the encapsulant.

2. The semiconductor device of claim 1 wherein the encapsulant barrier further comprises at least one vent for release of any expanding gases within air space separating the plurality of contact pads.

3. The semiconductor device of claim 1 wherein the encapsulant barrier is comprised of a same material as the plurality of contact pads.

4. The semiconductor device of claim 1 wherein the encapsulant barrier is comprised of a different material than the plurality of contact pads.

5. The semiconductor device of claim 1 further comprising:

a circuit implemented on the semiconductor die, the circuit using the encapsulant barrier as one of an electrical shield to isolate electromagnetic interference, an antenna or an inductor.

6. The semiconductor device of claim 5 wherein the circuit is electrically coupled to the encapsulant barrier.

7. The semiconductor device of claim 1 further comprising:

a circuit implemented on the semiconductor die, the circuit being electrically coupled to the encapsulant barrier for using the encapsulant barrier to implement an electrical function in the circuit.

8. The semiconductor device of claim 1 further comprising:

a passivation layer interposed between the plurality of contact pads and the first surface of the semiconductor die, wherein a portion of the encapsulant barrier is in physical contact with the passivation layer.

9. A semiconductor device, comprising:

a semiconductor die having a plurality of contact pad sites;

a plurality of contact pads in electrical contact with a predetermined corresponding different one of the plurality of contact pad sites;

an encapsulant barrier positioned at an outer perimeter of the semiconductor die, the encapsulant barrier having a height that is substantially as large as a highest of the plurality of contact pads, the encapsulant barrier having a first surface and a second surface, the first surface being in physical contact with a same surface of the semiconductor die as the plurality of contact pad sites;

a removable first layer having a first surface and a second surface, the first surface of the removable first layer being in direct physical contact with the second surface of the encapsulant barrier;

a second removable layer in direct physical contact with the removable first layer; and

an encapsulant surrounding the semiconductor die but being blocked from making physical contact with any of the plurality of contact pads by the encapsulant barrier, wherein the removable first layer and the removable second layer are removed from the semiconductor die after curing of the encapsulant.

10. The semiconductor device of claim 9 wherein the encapsulant barrier further comprises at least one vent for release of any expanding gases within an air space separating the plurality of con tact pads.

11. The semiconductor device of claim 9 further comprising:

a circuit implemented on the semiconductor die, the circuit using the encapsulant barrier as one of an electrical shield to isolate electromagnetic interference, an antenna or an inductor.

12. The semiconductor device of claim 9 further comprising:

a circuit implemented on the semiconductor die, the circuit being electrically coupled to the encapsulant barrier for using the encapsulant barrier to implement an electrical function in the circuit.

13. A semiconductor device, comprising:

a semiconductor die having a plurality of contact pad sites;

a plurality of contact pads in electrical contact with a predetermined corresponding different one of the plurality of contact pad sites;

an encapsulant barrier positioned at an outer perimeter of the semiconductor die, the encapsulant barrier having a height that is as high as or greater than a highest of the plurality of contact pads, the encapsulant barrier being in physical contact with a same surface of the semiconductor die as the contact pad sites; and

an encapsulant surrounding the semiconductor die and one side of the encapsulant barrier, the encapsulant being blocked from making physical contact with any of the plurality of contact pads by the encapsulant barrier when the semiconductor device is encapsulated while being supported by a temporary base support layer.

14. The semiconductor device of claim 13 wherein the encapsulant barrier further comprises at least one vent for release of any expanding gases within air spaces separating the plurality of contact pads.

15. The semiconductor device of claim 13 further comprising:

a circuit implemented on the semiconductor die, the circuit using the encapsulant barrier as one of an electrical shield to isolate electromagnetic interference, an antenna or an inductor.

16. The semiconductor device of claim 13 further comprising:

a circuit implemented on the semiconductor die, the circuit being electrically coupled to the encapsulant barrier for using the encapsulant barrier to implement an electrical function in the circuit.

17-20. -20. (canceled)