Method and apparatus for constructing wired-and bus systems

• US 20050246475A1
• Filed: 07/01/2005
• Published: 11/03/2005
• Est. Priority Date: 05/29/2001
• Status: Active Grant

• Current Assignee: Sun Microsystems Incorporated (Oracle Corporation)
• Original Assignee: Sun Microsystems Incorporated (Oracle Corporation)
• Inventors: Ervin, Joseph J.
• Granted Patent: US 7,284,079 B2
• Time in Patent Office: Days
• US Class Current: 710/306
• CPC Class Codes: G06F 13/4045 where the bus bridge performs an extender function

Abstract

A large multimaster I²C bus system is partitioned into smaller bus segments. The bus segments are connected by bridges that isolate the segments and direct selected transactions and commands between the segments. By programming address bitmaps that are internal to each bridge, transactions can pass through the bridges so that the various bus segments appear to be one logical bus. Because each bridge implements address filtering so that transactions are selectively forwarded from one side of the bridge to the other based on the contents of an internal address bitmap, I²C slave addresses can be arbitrarily populated on either side of the bridge. Duplicate I²C slave addresses can be also used on different segments of a single logical I²C bus system. Masters on one segment can reach devices connected to the same bus segment and can also reach devices with duplicate addresses on other bus segments by using a tunnel command addressed to a bridge.

Claims

1. A method of constructing a multi-segment wired-AND bus system wherein a first bus segment is connected to a second bus segment with a bus bridge in order to isolate faults, the method comprising:

(a) when the bus bridge is attempting to acquire the second bus segment and the second bus segment is busy for a predetermined period of time;

attempting to cause any device connected to the second bus segment to respond;

(b) if a device connected to the second bus segment responds within a second predetermined time, resetting the second bus segment.

2. The method of claim 1 further comprising:

(c) if no device connected to the second bus segment responds with the second predetermined time, informing a bus master on the first bus segment.

3. The method of claim 2 wherein step (c) comprises issuing a negative acknowledgement to the bus master.

4. The method of claim 1 wherein the second bus segment comprises a clock line and a data line and step (a) comprises toggling the clock line.

5. The method of claim 4 wherein step (b) comprises issuing a START/STOP command sequence.

6. Apparatus for constructing a multi-segment wired-AND bus system wherein a first bus segment is connected to a second bus segment with a bus bridge in order to isolate faults, the apparatus comprising:

means operable when the bus bridge is attempting to acquire the second bus segment and the second bus segment is busy for a predetermined period of time;

for attempting to cause any device connected to the second bus segment to respond;

means operable if a device connected to the second bus segment responds within a second predetermined time, for resetting the second bus segment.

7. The apparatus of claim 6 further comprising means operable if no device connected to the second bus segment responds with the second predetermined time, for informing a bus master on the first bus segment.

8. The apparatus of claim 7 wherein the means for informing a bus master comprises means for issuing a negative acknowledgement to the bus master.

9. The apparatus of claim 6 wherein the second bus segment comprises a clock line and a data line and the means for attempting to cause any device connected to the second bus segment to respond comprises means for toggling the clock line.

10. The apparatus of claim 9 wherein the means for resetting the second bus segment comprises means for issuing a START/STOP command sequence.