Resistor compensation apparatus

• US 20050248382A1
• Filed: 05/06/2004
• Published: 11/10/2005
• Est. Priority Date: 05/06/2004
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Momtaz, Afshin, Chung, David Kyong-Sik, Caresosa, Mario
• Granted Patent: US 7,042,271 B2
• Time in Patent Office: Days
• US Class Current: 327/362
• CPC Class Codes: H03F 2200/456 A scaled replica of a transistor being present in an amplifier
• CPC Class Codes: H03F 2200/465 Power sensing
• CPC Class Codes: H03F 2203/45292 the AAC comprising biasing means controlled by the signal
• CPC Class Codes: H03F 2203/45541 the IC comprising dynamic biasing means, i.e. controlled by the input signal
• CPC Class Codes: H03F 3/4508 using bipolar transistors as the active amplifying circuit H03F3/45278 takes precedence

Abstract

A compensation apparatus maintains an effective resistance of one or more resistors in a circuit by associating an adjustable resistor circuit to each resistor. The compensation apparatus compares the resistance of a resistor in the circuit with the resistance of a reference resistor. When the resistance of the resistor in the circuit falls outside of a desired range, the compensation apparatus adjusts the resistance of the adjustable resistor to adjust the effective resistance of the resistor and adjustable resistor combination.

Claims

1. A resistor compensation circuit comprising:

at least one reference resistor;

at least one circuit resistor;

a plurality of comparators for comparing resistances of the at least one reference resistor and the at least one circuit resistor to generate at least one control signal;

a fixed load resistor; and

at least one digital to analog converter, connected in parallel with the fixed load resistor, that provides a selectable resistance in accordance with the at least one control signal.

2. The resistor compensation circuit of claim 1 wherein the at least one digital to analog converter provides selectable resistance within discrete ranges of resistance.

3. The resistor compensation circuit of claim 1 wherein the at least one digital to analog converter comprises at least one series connected transistor and resistor, wherein the at least one series connected transistor and resistor is connected in parallel with the fixed load resistor.

4. The resistor compensation circuit of claim 1 comprising a current mode logic circuit that includes the at least one digital to analog converter.

5. The resistor compensation circuit of claim 1 wherein the at least one comparator compares a plurality of reference signals with at least one signal associated with an external to internal resistor ratio.

6. The resistor compensation circuit of claim 1 wherein ranges of resistance are associated with values of the at least one control signal.

7. The resistor compensation circuit of claim 1 comprising at least one resistor ladder for generating reference signals to provide input signals for the at least one comparator.

8. The resistor compensation circuit of claim 1 comprising at least one hysteresis circuit.

9. The resistor compensation circuit of claim 8 wherein the at least one hysteresis circuit selects reference signals to provide input signals for the at least one comparator.

10. The resistor compensation circuit of claim 1 comprising at least one hysteresis switch.

11. The resistor compensation circuit of claim 1 comprising at least one resistor ladder for generating reference signals and at least one hysteresis circuit, wherein the at least one hysteresis circuit selects at least a portion of the reference signals to provide input signals for the at least one comparator.

12. The resistor compensation circuit of claim 1 comprising at least one level decision circuit for detecting at least one signal level associated with the at least one control signal.

13. The resistor compensation circuit of claim 12 wherein the at least one level decision circuit comprises at least one counter.

14. The resistor compensation circuit of claim 1 comprising:

at least one resistor ladder for generating reference signals; and

at least one hysteresis circuit configured to select at least a portion of the reference signals to provide input signals for the at least one comparator; and

at least one level decision circuit for detecting a signal level associated with the at least one control signal.

15. The resistor compensation circuit of claim 14 wherein the at least one digital to analog converter comprises at least one transistor connected in series with at least one resistor connected in series, wherein the at least one transistor and at least one resistor are connected in parallel with at least one load resistor.

16. A current mode logic circuit comprising:

at least one differential transistor pair; and

at least one current source for the at least one differential transistor pair;

at least one programmable resistor that provides a variable resistance for the at least one differential transistor pair in accordance with at least one control signal.

17. The current mode logic circuit of claim 16 comprising a fixed load resistor connected in parallel with the at least one programmable resistor, wherein the at least one programmable resistor comprises at least one switch and at least one resistor, wherein the at least one resistor is connected between the at least one switch and at least one output node of the current mode logic circuit.

18. The current mode logic circuit of claim 16 wherein the at least one programmable resistor comprises at least one series connected transistor and resistor connected in parallel with a fixed load resistor.

19. The current mode logic circuit of claim 18 wherein for each series connected transistor and resistor the resistor is connected between the transistor and an output node of the current mode logic circuit.

20. The current mode logic circuit of claim 18 comprising at least one inductor connected between the at least one programmable resistor and a power supply lead.

21. A method of compensating resistance comprising:

providing at least one programmable resistor having a controllable resistance;

detecting variation in a resistance due to process or temperature variation;

generating at least one control signal in accordance with the detected variation in the resistance;

controlling the resistance of the at least one programmable resistor in accordance with the at least one control signal.

22. The method of claim 21 wherein the at least one programmable resistor comprises a fixed load resistor connected in parallel with at least one digital to analog converter.

23. The method of claim 22 wherein the at least one digital to analog converter provides selectable resistance within discrete ranges of resistance.

24. The method of claim 22 wherein the at least one digital to analog converter comprises at least one series connected transistor and resistor, wherein the at least one series connected transistor and resistor is connected in parallel with the fixed load resistor.

25. The method of claim 21 comprising comparing a plurality of reference signals with at least one signal associated with an external to internal resistor ratio.

26. The method of claim 21 wherein ranges of resistance are associated with values of the at least one control signal.

27. The method of claim 21 comprising generating reference signals and selecting at least a portion of the reference signals for comparison with at least one signal associated with an external to internal resistor ratio.

28. The method of claim 21 comprising detecting at least one signal level associated with the at least one control signal.

29. The method of claim 21 wherein detecting variation in a resistance comprises applying hysteresis to reference signal.

30. A current mode logic circuit comprising:

a differential transistor pair having differential output nodes;

a current source coupled to provide a tail current for the differential transistor pair; and

a plurality of digital to analog converters, coupled to the differential output nodes to provide variable resistance loads in accordance with at least one control signal, each digital to analog converter comprising at least one series connected switch and resistor connected in parallel with at least one load resistor, wherein a first node of each series connected resistor is connected to one of the differential output nodes and a second node of each series connected resistor is connected to a corresponding series connected switch.