Plasma treatment at film layer to reduce sheet resistance and to improve via contact resistance

• US 20050250320A1
• Filed: 05/10/2004
• Published: 11/10/2005
• Est. Priority Date: 05/10/2004
• Status: Active Grant

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Tsai, Jian Shin, Zhang, Wei, Chou, Yu-Hua, Tseng, Chi-Chan, Luo, Tzo-Hung, Yang, Jong-Chen
• Granted Patent: US 7,067,409 B2
• Time in Patent Office: Days
• US Class Current: 438/672
• CPC Class Codes: H01L 21/76843 formed in openings in a dielectric
• CPC Class Codes: H01L 21/7685 the layer covering a conductive structure H01L21/76849 takes precedence
• CPC Class Codes: H01L 21/76856 by treatment in plasmas or gaseous environments, e.g. nitriding a refractory metal liner
• CPC Class Codes: H01L 21/76862 Bombardment with particles, e.g. treatment in noble gas plasmas; UV irradiation

Abstract

A method of manufacturing a semiconductor device contact including forming an insulating layer over a substrate and forming an agglutinating layer over the insulating layer. The agglutinating layer is then exposed to a plasma treatment. A barrier layer is formed over the plasma-treated agglutinating layer, and a conductive layer is formed over the barrier layer.

Claims

1. A method of manufacturing a semiconductor device contact, comprising:

forming an insulating layer over a substrate;

forming an agglutinating layer over the insulating layer;

exposing the agglutinating layer to a plasma treatment;

forming a barrier layer over the plasma-treated agglutinating layer; and

forming a conductive layer over the barrier layer.

2. The method recited in claim 1 wherein the agglutinating layer comprises a materials selected from the group consisting of:

Ti;

Ta;

TiW;

TiN;

TaN;

SiOC; and

SiC.

3. The method recited in claim 1 wherein the agglutinating layer is formed by IMP deposition.

4. The method recited in claim 1 wherein the plasma treatment includes a process chemistry comprising nitrogen and hydrogen.

5. The method recited in claim 4 wherein the process chemistry comprises a nitrogen-containing composition at a flow rate of about 200 sccm and a hydrogen-containing composition at a flow rate of about 300 sccm.

6. The method recited in claim 4 wherein the plasma treatment employs a process temperature of about 450°

C., an RF power of about 750 W, and a process time ranging between about 10 seconds and about 30 seconds.

7. The method recited in claim 1 wherein the agglutinating layer has a thickness ranging between about 100 angstroms and about 160 angstroms.

8. The method recited in claim 1 wherein the barrier layer comprises a material selected from the group consisting of:

Ti;

Ta;

TiW;

TiN;

TaN;

SiOC; and

SiC.

9. The method recited in claim 1 wherein the barrier layer is formed by MOCVD.

10. The method recited in claim 9 wherein the MOCVD utilizes an organo-metallic precursor selected from the group consisting of:

TiCl₄;

TDMAT; and

TDEAT.

11. The method recited in claim 1 wherein the insulating layer includes a recess and the agglutinating, barrier and conductive layers are formed at least partially within the recess.

12. A method of manufacturing a semiconductor device, comprising:

providing a substrate having logic devices formed therein;

forming an insulating layer over the substrate and logic devices;

forming a plurality of recesses in the insulating layer each exposing a portion of one of the logic devices forming an agglutinating layer over the insulating layer and at least partially within the plurality of recesses;

exposing the agglutinating layer to a plasma treatment;

forming a barrier layer over the plasma-treated agglutinating layer and at least partially within the plurality of recesses; and

forming a bulk conductive layer over the barrier layer to fill the plurality of recesses.

13. The method recited in claim 12 wherein the agglutinating layer comprises TiN and is formed by IMP deposition.

14. The method recited in claim 12 wherein the plasma treatment includes a process chemistry comprising nitrogen and hydrogen.

15. The method recited in claim 14 wherein the process chemistry comprises a nitrogen-containing composition at a flow rate of about 200 sccm and a hydrogen-containing composition at a flow rate of about 300 sccm.

16. The method recited in claim 14 wherein the plasma treatment employs a process temperature of about 450°

C., an RF power of about 750 W, and a process time ranging between about 10 seconds and about 30 seconds.

17. The method recited in claim 12 wherein the agglutinating layer has a thickness ranging between about 100 angstroms and about 160 angstroms.

18. The method recited in claim 12 wherein the barrier layer comprises TiN and is formed by MOCVD.

19. The method recited in claim 18 wherein the MOCVD utilizes an organo-metallic precursor selected from the group consisting of:

TiCl₄;

TDMAT; and

TDEAT,

20. The method recited in claim 18 wherein the barrier layer includes a plurality of plasma densified TiN layers.

21. The method recited in claim 12 wherein the agglutinating layer is exposed to the plasma treatment substantially immediately after the agglutinating layer is formed.

22. A system for manufacturing a semiconductor device, comprising:

means for forming an insulating layer over a substrate;

means for forming an agglutinating layer over the insulating layer;

means for plasma treating the agglutinating layer;

means for forming a barrier layer over the plasma-treated agglutinating layer; and

means for forming a conductive layer over the barrier layer.

23. A semiconductor device, comprising:

a substrate;

a plurality of logic devices located over the substrate;

an insulating layer located over the logic devices and including a plurality of recesses exposing underlying ones of the logic devices;

a plasma-treated agglutinating layer located over the insulating layer including within the plurality of recesses;

a barrier layer located over the plasma-treated agglutinating layer including within the plurality of recesses; and

a conductive layer located over the barrier layer including within the plurality of recesses.

24. The semiconductor device recited in claim 23 wherein the plasma-treated agglutinating layer has a grain size about 20% larger than prior to plasma treatment.

25. The semiconductor device recited in claim 23 wherein the plasma-treated agglutinating layer, the barrier layer and the conductive layer collectively form a contact having a sheet resistance R_s ranging between about 70 Ω

/nm² and about 130 Ω

/nm² and a contact resistance R_c ranging between about 6 Ω

/nm² and about 9 Ω

/nm².