Micro-controller controlled power management chip

• US 20050250557A1
• Filed: 05/14/2004
• Published: 11/10/2005
• Est. Priority Date: 05/10/2004
• Status: Active Grant

• Current Assignee: Dialog Semiconductor GmbH (Renesas Electronics Corporation)
• Original Assignee: Dialog Semiconductor GmbH (Renesas Electronics Corporation)
• Inventors: Marschalkowski, Eric, Plankensteiner, Manfred
• Granted Patent: US 7,684,833 B2
• Time in Patent Office: Days
• US Class Current: 455/574
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode

Abstract

Novel power-management chips (PMCS) and a related method to increase the flexibility of power-management chips and to disburden a main controller of mobile electronic devices, such as e.g. a mobile phone, have been achieved. Key of the invention is to implement a microprocessor system on a power-management chip. This microprocessor, having a flash-memory and a RAM has either no or minimum interaction with a main controller of the mobile electronic device since the microprocessor on the PMC is controlling all power supply requirements of the mobile electronic device. The novel PMC is more flexible; since it is free programmable and customers can adapt their PMC more efficiently to the specific purposes of their application.

Claims

1. A system, used as a power-management chip to manage the power supply of mobile electronic devices, wherein all components are integrated on one chip, is comprising:

a micro-controller;

a means of memory to store the program of said micro-controller;

a means of memory to store data processed by said micro-controller;

a means to control the start-up and shut-down of said system;

a bus system connecting all components of the system;

a number of input and output ports;

means to control charging and voltage of the battery; and

means of power supply.

2. The system of claim 1 wherein said micro-controller is an 8051 micro-controller.

3. The system of claim 1 wherein said mobile electronic device is a mobile phone.

4. The system of claim 1 wherein said means of memory to store the program is a flash-memory.

5. The system of claim 4 wherein said flash-memory has 2.5 Kbytes.

6. The system of claim 1 wherein said means of memory to data processed by said microprocessor is a RAM.

7. The system of claim 6 wherein said RAM has 128 bytes.

8. The system of claim 1 wherein said means to control start-up and shut-down is comprising:

a power-on reset generator;

a band-gap reference;

a start-up logic;

a power key scanning;

a battery temperature supervision;

a battery supply supervision; and

a means to provide clock pulses.

9. The system of claim 8 wherein said means to provide clock pulses is an oscillator.

10. The system of claim 8 wherein said start-up logic is a state-machine.

11. The system of claim 1 wherein said means to control charging and voltage of the battery comprises a charger insertion and removal detection.

12. The system of claim 11 wherein said charger insertion and removal detection works with two comparators.

13. The system of claim 1 wherein said means to control charging and voltage of the battery comprises two charge modes, a linear charge mode and a fast-pulse charge mode.

14. The system of claim 1 wherein said system comprises eight general-purpose input/output ports and two 20 V general-purpose input/output ports.

15. The system of claim 1 wherein said means of power supply comprises at least one low drop-out (LDO) voltage converter.

16. The system of claim 1 wherein said means of power supply comprises at least one boost voltage converter.

17. The system of claim 1 wherein said means of power supply comprises at least one buck voltage converter.

18. The system of claim 1 wherein said means of power supply comprises at least one current source for LEDs.

19. A method to increase the flexibility of a power-management chip and to disburden a main controller of a mobile electronic device is comprising:

(1) provide a power management chip and a microprocessor having a flash-memory, a RAM, and a bus system;

(2) implement a microprocessor on the power-management chip;

(3) load control program of said microprocessor into flash-memory;

(4) check if modified requirements in regard of power management exist and go to wait if there are no modified requirements; and

(5) in case there are modified requirements, modify control program and go back to step (3).

20. The method of claim 19 wherein said microprocessor is an 8051 micro-controller.

21. The method of claim 19 wherein said flash-memory has 2.5 Kbytes.