High aspect ratio C-MEMS architecture

• US 20050255233A1
• Filed: 02/11/2005
• Published: 11/17/2005
• Est. Priority Date: 02/11/2004
• Status: Abandoned Application

• Current Assignee: Regents of the University of California (University of California)
• Original Assignee: Regents of the University of California (University of California)
• Inventors: Wang, Chunlei, Zaouk, Rabih, Park, Benjamin, Madou, Marc J., Jia, Guangyao, Taherabadi, Lili
• Application Number:
  US11/057,389
• Publication Number:
  US 20050255233A1
• Time in Patent Office: Days
• US Class Current: 427/96.100
• CPC Class Codes: H01M 4/583 Carbonaceous material, e.g. graphite-intercalation compounds or CFx
• CPC Class Codes: H01M 4/663 containing carbon or carbonaceous materials as conductive part, e.g. graphite, carbon fibres
• CPC Class Codes: Y02E 60/10 Energy storage using batteries

Abstract

C-MEMS architecture having high aspect ratio carbon structures and improved systems and methods for producing high aspect ratio C-MEMS structures are provided. Specifically, high aspect ratio carbon structures are microfabricated by pyrolyzing a patterned carbon precursor polymer. Pyrolysing the polymer preferably comprises a multi-step process in an atmosphere of inert and forming gas at high temperatures that trail the glass transit temperature (Tg) for the polymer. Multi-layer C-MEMS carbon structures are formed from multiple layers of negative photoresist, wherein a first layer forms carbon interconnects and the second and successive layers form high aspect ratio carbon structures. High-conductivity interconnect traces to connect C-MEMS carbon structures are formed by depositing a metal layer on a substrate, patterning a polymer precursor on top of the metal layer and pyrolyzing the polymer to create the final structure. The interconnects of a device with high aspect ratio electrodes are insulated using a self aligning insulation method.

Claims

1. A process for forming high aspect ratio carbon structures comprising the steps of

patterning a carbon precursor polymer on a substrate, and

pyrolyzing the patterned carbon precursor polymer in a multi-step pyrolysis process in an inert and forming gas atmospheres while trailing the glass transition temperature of the patterned carbon precursor polymer.

2. The process of claim 1 wherein the carbon precursor polymer is a negative photoresist.

3. The process of claim 2 wherein the negative photoresist comprises SU-8 photoresist.

4. The process of claim 2 wherein the patterning step comprises photopatterning the negative photoresist.

5. The process of claim 2 wherein the step patterning includes the steps of

spin coating a film of the negative photoresist on to the substrate,

soft baking the negative photoresist and substrate,

exposing the photoresist to UV light with a mask,

post baking the photoresist, and

developing the photoresist.

6. The process of claim 1 wherein the pyrolyzing step includes

baking the patterned carbon precursor polymer at a first temperature for a first predetermined period of time in an inert gas atmosphere,

heating the patterned carbon precursor polymer to a second predetermined temperature in the inert gas atmosphere, and

heating the patterned carbon precursor polymer at the second temperature for a second predetermined period of time in a forming gas atmosphere.

7. The process of claim 5 further comprising the step of cooling the patterned carbon precursor polymer to a third temperature.

8. The process of claim 1 wherein the patterning step includes patterning first and second layers of the carbon precursor polymer.

9. The process of claim 8 wherein the first layer is patterned as interconnects for electrodes and the second layer is patterned as electrodes and aligned on top of the interconnects.

10. The process of claim 8 wherein the first layer is patterned as a first section of an electrode and the second layer is patterned as a second section of the electrode.

11. The process of claim 9 wherein the patterning step includes patterning a third layer wherein the second and third layers are patterned as the first and second sections of the electrodes.

12. The process of claim 1 further comprising the step of reducing the internal electrical resistance of a device comprising the high aspect ratio carbon structures.

13. The process of claim 12 wherein the reducing the internal electrical resistance step includes patterning a layer of metal on the substrate to act as electrode interconnects prior to patterning the carbon precursor polymer.

14. The process of claim 1 further comprising the step of self aligning insulation over interconnects of a device comprising the high aspect ratio carbon structures coupled to the interconnects.

15. A process of minimizing the internal resistance of C-MEMs based electrochemical device comprising the steps of

depositing a layer of metal on a substrate,

patterning the layer of metal to form electrical interconnects on the substrate,

patterning carbon precursor polymer structures over the metal interconnects, and

carbonizing the carbon precursor structures.

16. The process of claim 15 wherein the metal is a refractory metal.

17. The process of claim 15 wherein the metal is a carbon based metal alloy.

18. The process of claim 15 wherein the substrate is a high surface energy substrate.

19. The process of claim 15 wherein the patterning of carbon precursor polymer structures comprises patterning high aspect ratio structures on top of the interconnects.

20. The process of claim 19 wherein the carbon precursor polymer is a negative photoresist.

21. The process of claim 20 wherein the step of carbonizing the high aspect ratio structures includes a muti-step pyrolyzing process.

22. The process of claim 21 wherein the multi-step pyrolyzing process includes the steps of

heating the high aspect ratio structures at a first temperature for a first predetermined period of time in an inert gas atmosphere,

heating the high aspect ratio structures to a second predetermined temperature in the inert gas atmosphere, and

heating the high aspect ratio structures at the second temperature for a second predetermined period of time in a forming gas atmosphere.

23. The process of claim 22 further comprising the step of cooling the high aspect ratio structures to a third temperature.

24. A self aligning insulating process of interconnects in a device comprising high aspect ratio electrodes coupled to the interconnects, the process comprising the steps of

applying a layer of photoresist over the electrodes and interconnects, and

heating the photoresist to a temperature causing the photoresist to flow and self aligningly cover the interconnects.

25. The process of claim 24 further comprising the step of removing photoresist from around the electrodes.

26. The process of claim 25 wherein the photoresist is removed with a photolithography process.

27. The process of claim 26 wherein the photoresist is heated to a temperature above it glass transition temperature and below a temperature at which it becomes conductive.