×

Method and apparatus for bit error rate test

  • US 20050257104A1
  • Filed: 05/14/2004
  • Published: 11/17/2005
  • Est. Priority Date: 05/14/2004
  • Status: Abandoned Application
First Claim
Patent Images

1. A method, comprising:

  • programming a sequencer circuit to recognize at least one predefined invalid bit pattern;

    storing an expected bit pattern;

    receiving a bit pattern from the device; and

    after a start of data pattern is received by the sequencer and while the sequencer circuit recognizes the received bit pattern as other than invalid, comparing the received bit pattern against the expected bit pattern;

    computing a bit error rate based on the number of compared bits and the number of error bits, wherein error bits are bit pattern bits that differ from corresponding bits in the expected bit pattern.

View all claims
  • 1 Assignment
Timeline View
Assignment View
    ×
    ×