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Cyclic redundancy check circuit for use with self-synchronous scramblers

  • US 20050257113A1
  • Filed: 06/28/2005
  • Published: 11/17/2005
  • Est. Priority Date: 05/20/2002
  • Status: Active Grant
First Claim
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1. A circuit for detecting and correcting errors in a bit stream, said circuit including at least two logical gates that determine if at least one of a plurality of conditions is present, each one of said plurality of conditions indicating at least one error in said bit stream and activation of at least one of said at least two logical gates changes a state of a specific bit in said bit stream to correct at least one error.

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