System and method for ensuring merge completion in a storage area network

• US 20050262298A1
• Filed: 06/27/2005
• Published: 11/24/2005
• Est. Priority Date: 03/26/2002
• Status: Active Grant

• Current Assignee: Anuja Korgaonkar, Clark Lubbers, James Mccarty, Jason Leveille, Randy Hess, Stephen J. Sicola, Susan Elkington
• Original Assignee: Anuja Korgaonkar, Clark Lubbers, James Mccarty, Jason Leveille, Randy Hess, Stephen J. Sicola, Susan Elkington
• Inventors: Hess, Randy, Lubbers, Clark, Leveille, Jason, Korgaonkar, Anuja, Elkington, Susan, McCarty, James, Sicola, Stephen J.
• Granted Patent: US 7,137,032 B2
• Time in Patent Office: Days
• US Class Current: 711/112
• CPC Class Codes: G06F 11/2005 using redundant communication controllers
• CPC Class Codes: G06F 11/2007 using redundant communication media
• CPC Class Codes: G06F 11/2033 switching over of hardware resources
• CPC Class Codes: G06F 11/2064 while ensuring consistency
• CPC Class Codes: G06F 11/2079 Bidirectional techniques
• CPC Class Codes: G06F 11/2082 Data synchronisation
• CPC Class Codes: G06F 11/2089 Redundant storage control functionality
• CPC Class Codes: H04L 67/1097 for distributed storage of data in networks, e.g. transport arrangements for network file system [NFS], storage area networks [SAN] or network attached storage [NAS]
• CPC Class Codes: H04L 69/329 in the application layer [OSI layer 7]

Abstract

A data storage system adapted to maintain redundant data storage sets at a destination location(s) is disclosed. The data storage system establishes a copy set comprising a source volume and a destination volume. Data written to a source volume is automatically copied to the destination volume. The data storage system maintains a data log that may be activated when the destination volume is inaccessible due to, for example, a malfunction in the destination storage system or in the communication link between the source system and the destination system. I/O commands and the data associated with those commands are written to the data log, and after a destination system becomes available the information in the data log is merged into the destination volume to conform the data in the destination volume to the data in the source volume. The data log competes for disk capacity with other volumes on the system, and log memory is allocated as needed. During the merge process the system maintains the ratio of merge data writes out of the data log to data writes from a host computer into the data log within a desired range until the data log reaches a predetermined size, whereupon data writes into the data log are quiesced to permit the merge write process to complete.

Claims

1. A method for managing disk capacity allocated to a data log in a source data storage system during a merge process wherein data in the data log may be merged into corresponding data on a destination storage system connected to the source data storage system by at least one communication link, the method comprising the steps of:

maintaining a ratio of merge writes out of the data log to writes from a host computer into the data log within a desired range until the write process reaches a predetermined distance from the end of the data log; and

quiescing writes from a host computer into the data log until the data log is fully written to the destination storage system.

2. The method of claim 1, including the additional step of sending the host computer a write completion status message prior to sending the data to the destination storage system.

3. The method of claim 1, further comprising the step of performing a transaction-order merging of data from the log unit with data previously stored on the destination storage system to return the data on the source data storage system and the destination storage system to a consistent data state.

4. The method of claim 3, wherein host computer continues to write said data from the host computer to the data log during a portion of the time the merging is being performed.

5. The method of claim 1, wherein the data log comprises a storage set treated as a logical unit by the array controller.

6. The method of claim 1, wherein data written by the host computer is stored in cache memory in a first array controller in transaction order.

7. The method of claim 1, wherein data written by the host computer is written in synchronous mode.

8. The method of claim 1, wherein data written by the host computer is written in asynchronous mode.

9. The method of claim 1, wherein the ratio of merge writes to host writes is maintained greater than 1:

1.

19. The method of claim 1, wherein maintaining a ratio of merge writes out of the data log to writes from a host computer into the data log within a desired range until the write process reaches a predetermined distance from the end of the data log comprises:

determining a difference between an incoming data rate and a log memory segment allocation rate; and

increasing a memory allocation increment when the difference is greater than a first threshold value.

20. The method of claim 1, wherein maintaining a ratio of merge writes out of the data log to writes from a host computer into the data log within a desired range until the write process reaches a predetermined distance from the end of the data log comprises:

determining a difference between an incoming data rate and a log memory segment allocation rate; and

increasing a memory allocation increment when the difference is less than a second threshold value.

10-18. -18. (canceled)

21. A storage controller, comprising:

a processor;

a memory module communicatively coupled to the processor and comprising logic instructions which, when executed by the processor, configure the processor to manage disk capacity allocated to a data log in a source data storage system during a merge process, wherein data in the data log may be merged into corresponding data on a destination storage system connected to the source data storage system by at least one communication link, by performing operations comprising;

maintaining a ratio of merge writes out of the data log to writes from a host computer into the data log within a desired range until the write process reaches a predetermined distance from the end of the data log; and

quiescing writes from a host computer into the data log until the data log is fully written to the destination storage system.

22. The storage controller of claim 21, further comprising logic instructions which, when executed by the processor, configure the processor to send the host computer a write completion status message prior to sending the data to the destination storage system.

23. The storage controller of claim 21, further comprising logic instructions which, when executed by the processor, configure the processor to perform a transaction-order merging of data from the log unit with data previously stored on the destination storage system to return the data on the source data storage system and the destination storage system to a consistent data state.

24. The storage controller of claim 21, further comprising logic instructions which, when executed by the processor, configure the processor to write said data from the host computer to the data log during a portion of the time the merging is being performed.

25. The storage controller of claim 21, wherein the data log comprises a storage set treated as a logical unit by the array controller.

26. The storage controller of claim 21, wherein data written by the host computer is stored in cache memory in a first array controller in transaction order.

27. The storage controller of claim 21, wherein data written by the host computer is written in synchronous mode.

28. The storage controller of claim 21, wherein data written by the host computer is written in asynchronous mode.

29. The storage controller of claim 21, wherein the ratio of merge writes to host writes is maintained greater than 1:

1.

30. The storage controller of claim 21, further comprising logic instructions which, when executed by the processor, configure the processor to:

determine a difference between an incoming data rate and a log memory segment allocation rate; and

increase a memory allocation increment when the difference is greater than a first threshold value.

31. The storage controller of claim 21, further comprising logic instructions which, when executed by the processor, configure the processor to

determine a difference between an incoming data rate and a log memory segment allocation rate;

and

increase a memory allocation increment when the difference is less than a second threshold value.