Semiconductor device and method for fabricating the same

• US 20050263847A1
• Filed: 07/27/2005
• Published: 12/01/2005
• Est. Priority Date: 05/26/2003
• Status: Active Grant

• Current Assignee: LAPIS Semiconductor Co., Ltd. (ROHM Co., Ltd.)
• Original Assignee: Oki Semiconductor Company Limited (ROHM Co., Ltd.)
• Inventors: Terui, Makoto, Anzai, Noritaka
• Granted Patent: US 7,511,351 B2
• Time in Patent Office: Days
• US Class Current: 257/531
• CPC Class Codes: H01L 23/3114 the device being a chip scale package, e.g. CSP
• CPC Class Codes: H01L 23/5227 Inductive arrangements or effects of, or between, wiring layers other inductive arrangements H01L23/645
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: Y10T 29/49073 by assembling coil and core

Abstract

In a semiconductor device having a WCSP type construction package, to increase inductance without increasing further an area conventionally occupied by a coil. A pseudo-post part 27 comprising a magnetic body is extended in a direction perpendicular to a main surface 12a of a semiconductor chip 12, on a second insulating layer 21 of a WCSP 10. A first conductive part 15a and a second conductive part 15b constructed as square frames are respectively provided so as to surround the pseudo-post part, on respective top surfaces of a second insulation layer and a third insulating layer 22 which are separated parallel to each other, in an extension direction of the pseudo-post part. A coil 100 being a substantially spiral shape conductive path is formed from, the first conductive part, the second conductive part, and a connection part 26 which electrically connects the one ends of the first and second conductive parts.

Claims

1-10. -10. (canceled)

11. A semiconductor device, comprising:

a semiconductor chip provided with a circuit element;

a coil provided on an upper side of said semiconductor chip, which is packaged with a dimension effectively the same as an outer dimension of said semiconductor chip; and

a magnetic body provided on an upper side of said semiconductor chip, and surrounded by said coil, wherein

said magnetic body extends along a main surface of said semiconductor chip,

said coil forms a substantially spiral shaped conductive path which is wound along an extension direction so as to surround said magnetic body,

said magnetic body is a substantially square column,

said coil is provided with a first conductive part provided on a first plane parallel with a main surface of said semiconductor chip, a second conductive part provided on a second plane parallely separated in a perpendicular direction with respect to said main surface, and a connection part which electrically connects end parts of said first conductive part and said second conductive part, and

said first conductive part, said second conductive part, and said connection part form a substantially spiral shaped conductive path.

12. A semiconductor device according to claim 11, wherein

said connection part is arranged in two rows at predetermined spacing in the extension direction of said magnetic body, and said connection parts of each row are provided in a zigzag configuration.

18. A semiconductor device according to claim 11, further comprising:

an electrode pad provided on the main surface of said semiconductor chip and electrically connected to said circuit element;

an insulation layer provided on said semiconductor chip so that one part of a top surface of said electrode pad is exposed;

external terminals respectively provided at positions different to immediately above said electrode pad;

a wiring layer provided on a surface of said insulation layer on an opposite side to the semiconductor chip with said insulation layer therebetween, and which electrically connects said electrode pad and said external terminals, wherein said coil is provided with a part comprising an a conductive member common with a conductive member constituting said wiring layer.

19. A semiconductor device according to claim 11, wherein

said magnetic body is a ferromagnetic body.

13-16. -16. (canceled)

17. A semiconductor device, comprising:

a semiconductor chip provided with a circuit element;

a coil Provided on an upper side of said semiconductor chip, which is packaged with a dimension effectively the same as an outer dimension of said semiconductor chip;

a tabular first magnetic layer which is provided alone a surface substantially parallel with a main surface of said semiconductor chip, wherein the coil is formed substantially at a position opposing said first magnetic layer;

a tabular second magnetic layer, which is provided at a position facing said first magnetic layer with said coil therebetween; and

a passivation coating, which is provided as a the surface layer of said semiconductor chip, wherein

one of said first magnetic layer and said second magnetic layer is covered with said passivation coating.

22. A semiconductor device according to claim 17, further comprising:

an electrode pad provided on the main surface of said semiconductor chip and electrically connected to said circuit element;

an insulation layer provided on said semiconductor chip so that one part of a top surface of said electrode pad is exposed;

external terminals respectively provided at positions different to immediately above said electrode pad;

a wiring layer provided on a surface of said insulation layer on an opposite side to the semiconductor chip with said insulation layer therebetween, and which electrically connects said electrode pad and said external terminals, wherein

said coil is provided with a part comprising an a conductive member common with a conductive member constituting said wiring layer.

23. A semiconductor device according to claim 17, wherein said magnetic body is a ferromagnetic body.

20. A method for fabricating a semiconductor device, which comprises a semiconductor chip provided with a circuit element;

and a coil provided on an upper side of said semiconductor chip, which is packaged with a dimension effectively the same as an outer dimension of said semiconductor chip, comprising;

forming, in a same process, a wiring layer, and a magnetic body on the upper side of said semiconductor chip, and at a position surrounded by said coil.

21. A method for fabricating a semiconductor device, which comprises a semiconductor chip provided with a circuit element;

and a coil provided on an upper side of said semiconductor chip, which is packaged with a dimension effectively the same as an outer dimension of said semiconductor chip, comprising

forming a tabular first magnetic body along a surface substantially parallel with a main surface of said semiconductor chip, and

forming a coil at a position opposing said first magnetic body.

24. The method recited in claim 21, further comprising forming a tabular second magnetic body, so that the tabular second magnetic body and the tabular first magnetic body are arranged at opposite sides of the coil, with the coil sandwiched therebetween.