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Linearity enhanced amplifier

  • US 20050264365A1
  • Filed: 05/26/2005
  • Published: 12/01/2005
  • Est. Priority Date: 05/28/2004
  • Status: Abandoned Application
First Claim
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1. An amplifier bias circuit for use with an amplifier transistor receiving an input signal, comprising:

  • a current buffer configured to provide DC bias control of the amplifier transistor and to improve linearity of the amplifier transistor by creating a predistortion of the input signal; and

    a current source configured to generate a current for injection into the current buffer to adjust the extent of predistortion and to compensate for effects caused by variations in ambient conditions.

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