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Method of implementing an accelerated graphics port for a multiple memory controller computer system

  • US 20050264575A1
  • Filed: 07/27/2005
  • Published: 12/01/2005
  • Est. Priority Date: 12/30/1997
  • Status: Active Grant
First Claim
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1. A method of manufacturing a multiple memory controller computer comprising:

  • providing at least two memory controllers for controlling a main memory; and

    connecting a first of the at least two memory controllers to an I/O processor;

    wherein a second of the at least two memory controllers handles requests that are not meant for the I/O processor, and wherein the first of the at least two memory controllers is configured to reroute requests that are not meant for the I/O processor to the second of the at least two memory controllers.

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