System for using rapid acquisition spreading codes for spread-spectrum communications

• US 20050265430A1
• Filed: 07/14/2005
• Published: 12/01/2005
• Est. Priority Date: 06/30/1995
• Status: Active Grant

• Current Assignee: Interdigital Technology Corporation (InterDigital, Inc.)
• Original Assignee: Interdigital Technology Corporation (InterDigital, Inc.)
• Inventors: Lomp, Gary R., Ozluturk, Fatih M.
• Granted Patent: US 7,706,332 B2
• Time in Patent Office: Days
• US Class Current: 375/145
• CPC Class Codes: G06F 13/374 using a self-select method with individual priority code comparator
• CPC Class Codes: H03H 17/0226 comprising look-up tables
• CPC Class Codes: H03H 17/06 Non-recursive filters
• CPC Class Codes: H03H 21/0018 Matched filters
• CPC Class Codes: H03H 2218/06 Multiple-input, multiple-output [MIMO]; Multiple-input, single-output [MISO]
• CPC Class Codes: H04B 1/7075 with code phase acquisition
• CPC Class Codes: H04B 1/70752 Partial correlation
• CPC Class Codes: H04B 1/70753 Partial phase search
• CPC Class Codes: H04B 1/70755 Setting of lock conditions, e.g. threshold
• CPC Class Codes: H04B 1/70758 Multimode search, i.e. using multiple search strategies
• CPC Class Codes: H04B 1/708 Parallel implementation
• CPC Class Codes: H04B 1/7085 using a code tracking loop, e.g. a delay-locked loop
• CPC Class Codes: H04B 1/7093 Matched filter type
• CPC Class Codes: H04B 1/7115 Constructive combining of multi-path signals, i.e. RAKE receivers
• CPC Class Codes: H04B 1/712 Weighting of fingers for combining, e.g. amplitude control or phase rotation using an inner loop
• CPC Class Codes: H04B 2201/70701 featuring pilot assisted reception
• CPC Class Codes: H04B 2201/70702 Intercell-related aspects
• CPC Class Codes: H04B 2201/70703 using multiple or variable rates
• CPC Class Codes: H04B 2201/70707 Efficiency-related aspects
• CPC Class Codes: H04B 2201/7071 with dynamic control of receiver resources
• CPC Class Codes: H04B 7/2628 : using code-division multiple access [CDMA] or spread spectrum multiple access [SSMA] H04B7/2618 takes precedence
• CPC Class Codes: H04B 7/2637 : for logical channel control
• CPC Class Codes: H04B 7/264 : for data rate control
• CPC Class Codes: H04J 13/004 : Orthogonal
• CPC Class Codes: H04J 13/10 : Code generation
• CPC Class Codes: H04J 13/107 : by concatenation
• CPC Class Codes: H04L 1/004 : by using forward error control H04L1/0618 takes precedence; coding, decoding or code conversion, for error detection or correction H03M13/00
• CPC Class Codes: H04L 2027/003 : at baseband only
• CPC Class Codes: H04L 2027/0053 : Closed loops
• CPC Class Codes: H04L 25/0212 : of impulse response
• CPC Class Codes: H04L 27/206 : using a pair of orthogonal carriers, e.g. quadrature carriers
• CPC Class Codes: H04L 27/2332 : using a non-coherent carrier
• CPC Class Codes: H04L 5/1446 : of transmission speed
• CPC Class Codes: H04W 52/08 : Closed loop power control
• CPC Class Codes: H04W 52/146 : Uplink power control
• CPC Class Codes: H04W 52/24 : using SIR [Signal to Interference Ratio] or other wireless path parameters
• CPC Class Codes: H04W 52/26 : using transmission rate or quality of service QoS [Quality of Service]
• CPC Class Codes: H04W 52/322 : Power control of broadcast channels
• CPC Class Codes: H04W 52/325 : Power control of control or pilot channels
• CPC Class Codes: H04W 52/343 : taking into account loading or congestion level
• CPC Class Codes: H04W 52/36 : with a discrete range or set of values, e.g. step size, ramping or offsets
• CPC Class Codes: H04W 52/367 : Power values between minimum and maximum limits, e.g. dynamic range
• CPC Class Codes: H04W 52/44 : in connection with interruption of transmission
• CPC Class Codes: H04W 52/50 : at the moment of starting communication in a multiple access environment
• CPC Class Codes: H04W 52/52 : using AGC [Automatic Gain Control] circuits or amplifiers
• CPC Class Codes: H04W 52/54 : Signalisation aspects of the TPC commands, e.g. frame structure
• CPC Class Codes: H04W 52/60 : using different transmission rates for TPC commands
• CPC Class Codes: Y02D 10/00 : Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

A system for rapidly acquiring a spreading code, used in a code division multiple access (CDMA) system, comprises a generator for generating a first long code and a second long code, with each long code having a length of N chips. The first long code is different from the second long code. A transmitter transmits the first long code and the second long code at a first phase angle and at a second phase angle, respectively, on a carrier signal over a communications channel using radio waves. The first long code and the second long code may be transmitted at an in-phase (I) angle and at a quadrature-phase (Q) angle, respectively, on the carrier signal. From the communications channel, an I acquisition circuit and a Q acquisition circuit may acquire, in parallel, the first long code and the second long code from the I angle and the Q angle, respectively, of the carrier signal by searching, in parallel, N/2 chips of the first long code and the second long code.

Claims

1. A method for transmitting data from a base station to a subscriber unit in a code division multiple access communication system, the method comprising:

producing a first code, the first code produced by a linear feedback shift register circuit, the linear feedback shift register circuit having a total of thirty six stages;

combining the first code with a short code to produce a spreading sequence, the short code shorter than the first code;

combining the spreading sequence with encoded message data, producing spread data; and

transmitting the spread data as a quadrature modulated signal.

3. The method of claim 1 wherein the encoded data is convolutionally encoded data.

4. The method of claim 1 further comprising transmitting a spread pilot channel, the spread pilot channel having a spreading sequence, the spreading sequence produced by combing a second short code with a second long code, the second long code produced by a linear feedback shift register circuit, the linear feedback shift register circuit having a total of thirty six stages.

5. The method of claim 1 wherein the first feedback shift register is a linear feedback shift register.

6. The method of claim 1 further comprising transmitting paging information on a broadcast channel, the broadcast channel having a spreading sequence, the spreading sequence produced by combing a second short code with a second long code, the second long code produced by a linear feedback shift register circuit, the linear feedback shift register circuit having a total of thirty six stages.

7. The method of claim 1 further comprising transmitting a spread pilot channel, the spread pilot channel having a code produced by binary addition of a first sequence produced from the first feedback shift register with a second sequence produced by the second feedback shift register.

8. The method of claim 1 further comprising transmitting paging information on a broadcast channel, the broadcast channel having a code produced by binary addition of a first sequence produced from the first feedback shift register with a second sequence produced by the second feedback shift register.

2. The method of clam 1 wherein the quadrature modulated signal is a quadrature phase shift keying signal.