Techniques for operating semiconductor devices

• US 20050268207A1
• Filed: 05/28/2004
• Published: 12/01/2005
• Est. Priority Date: 05/28/2004
• Status: Active Grant

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Worledge, Daniel Christopher, Gallagher, William Joseph
• Granted Patent: US 7,506,236 B2
• Time in Patent Office: Days
• US Class Current: 714/763
• CPC Class Codes: G11C 11/16 using elements in which the storage effect is based on magnetic spin effect

Abstract

Techniques for data storage are provided. In one aspect, a method for writing one or more magnetic memory cells comprises the following steps. Data is written to one or more of the magnetic memory cells. It is detected whether there are any errors in the data written to the one or more magnetic memory cells. The data is rewritten to each of the one or more previously written magnetic memory cells in which an error is detected.

Claims

1. A method for writing one or more magnetic memory cells, the method comprising the steps of:

writing data to one or more of the magnetic memory cells;

detecting whether there are any errors in the data written to the one or more magnetic memory cells; and

rewriting the data to each of the one or more previously written magnetic memory cells in which an error is detected.

2. The method of claim 1, wherein at least one of the one or more magnetic memory cells comprises a free layer having at least two magnetic layers anti-parallel coupled by at least one spacer layer.

3. The method of claim 1, wherein at least one of the one or more magnetic memory cells is configured to have a substantially predictable soft error rate during writing.

4. The method of claim 1, further comprising the step of repeating the steps of detecting and rewriting until at most one error is detected.

5. The method of claim 1, further comprising the step of repeating the steps of detecting and rewriting until no errors are detected.

6. The method of claim 1, wherein a probability that an error will occur in any one of the one or more magnetic memory cells is substantially equivalent to

$1-\exp$

[ - t τ

⁢

ⅇ

- E a / kT ] ,

wherein τ

is the attempt period, t is the length of time the magnetic memory cell has activation energy E_a, k is Boltzmann'"'"'s constant and T is absolute temperature.

7. The method of claim 3, wherein the substantially predictable soft error rate of the one or more magnetic memory cells is less than or equal to about three percent.

8. The method of claim 1, wherein the steps of detecting and rewriting are repeated less than or equal to ten times.

9. The method of claim 1, wherein the errors are detected by comparing the data written to the one or more magnetic memory cells with input data.

10. The method of claim 1, comprising a variable write time.

11. The method of claim 1, wherein the step of detecting further comprises the step of using error correction code to detect errors.

12. The method of claim 11, wherein the step of rewriting the data to the magnetic memory cells is performed when a number of errors is greater than or equal to two.

13. A method for writing one or more memory cells, the method comprising the steps of:

writing data to one or more of the memory cells;

detecting whether there are any errors in the data written to the one or more memory cells using error correction code; and

rewriting the data to each of the one or more previously written memory cells in which an error is detected when a number of errors detected is greater than or equal to two.

14. An apparatus for writing one or more magnetic memory cells, the apparatus comprising:

a memory; and

at least one processor, coupled to the memory, operative to;

write data to one or more of the magnetic memory cells;

detect whether there are any errors in the data written to the one or more magnetic memory cells; and

rewrite the data to each of the one or more previously written magnetic memory cells in which an error is detected.

15. An article of manufacture for writing one or more magnetic memory cells, comprising a machine readable medium containing one or more programs which when executed implement the steps of:

writing data to one or more of the magnetic memory cells;

detecting whether there are any errors in the data written to the one or more magnetic memory cells; and

rewriting the data to each of the one or more previously written magnetic memory cells in which an error is detected.

16. An integrated circuit including at least one magnetic random access memory circuit, the at least one random access memory circuit comprising:

a plurality of magnetic memory cells;

a plurality of bit lines and word lines for selectively accessing one or more of the memory cells; and

a write circuit coupled to at least a portion of the bit lines and word lines, the write circuit being adapted to;

write data to one or more of the magnetic memory cells;

detect whether there are any errors in the data written to the one or more magnetic memory cells; and

rewrite the data to each of the one or more previously written magnetic memory cells in which an error is detected.